C8051F310-TB Silicon Laboratories Inc, C8051F310-TB Datasheet - Page 155
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C8051F310-TB
Manufacturer Part Number
C8051F310-TB
Description
BOARD PROTOTYPING W/C8051F310
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F310-TB
Contents
Board
Processor To Be Evaluated
C8051F31x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F310
Silicon Family Name
C8051F31x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F310
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- Current page: 155 of 228
- Download datasheet (2Mb)
ARBLOST
MASTER
TXMODE
ACKRQ
STO
ACK
STA
Bit
SI
• A START is generated.
• START is generated.
• SMB0DAT is written before the start of an
• A START followed by an address byte is
• A STOP is detected while addressed as a
• Arbitration is lost due to a detected STOP.
• A byte has been received and an ACK
• A repeated START is detected as a MASTER
• SCL is sensed low while attempting to gener-
• SDA is sensed low while transmitting a ‘1’
• The incoming ACK value is low (ACKNOWL-
• A START has been generated.
• Lost arbitration.
• A byte has been transmitted and an
• A byte has been received.
• A START or repeated START followed by a
• A STOP has been received.
Table 14.3. Sources for Hardware Changes to SMB0CN
SMBus frame.
received.
slave.
response value is needed.
when STA is low (unwanted repeated START).
ate a STOP or repeated START condition.
(excluding ACK bits).
EDGE).
ACK/NACK received.
slave address + R/W has been received.
Set by Hardware When...
Rev. 1.7
C8051F310/1/2/3/4/5/6/7
• A STOP is generated.
• Arbitration is lost.
• A START is detected.
• Arbitration is lost.
• SMB0DAT is not written before the
• Must be cleared by software.
• A pending STOP is generated.
• After each ACK cycle.
• Each time SI is cleared.
• The incoming ACK value is high (NOT
• Must be cleared by software.
start of an SMBus frame.
ACKNOWLEDGE).
Cleared by Hardware When...
155
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