C8051F310-TB Silicon Laboratories Inc, C8051F310-TB Datasheet - Page 100

• Manufacturer Part Number: C8051F310-TB
• Description: BOARD PROTOTYPING W/C8051F310
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F310-TB

• Contents: Board
• Processor To Be Evaluated: C8051F31x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F310
• Silicon Family Name: C8051F31x
• Kit Contents: Board
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F310
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

C8051F310/1/2/3/4/5/6/7
100
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
PT3
R/W
Bit7
PT3: Timer 3 Interrupt Priority Control.
This bit sets the priority of the Timer 3 interrupt.
0: Timer 3 interrupts set to low priority level.
1: Timer 3 interrupts set to high priority level.
PCP1: Comparator1 (CP1) Interrupt Priority Control.
This bit sets the priority of the CP1 interrupt.
0: CP1 interrupt set to low priority level.
1: CP1 interrupt set to high priority level.
PCP0: Comparator0 (CP0) Interrupt Priority Control.
This bit sets the priority of the CP0 interrupt.
0: CP0 interrupt set to low priority level.
1: CP0 interrupt set to high priority level.
PPCA0: Programmable Counter Array (PCA0) Interrupt Priority Control.
This bit sets the priority of the PCA0 interrupt.
0: PCA0 interrupt set to low priority level.
1: PCA0 interrupt set to high priority level.
PADC0 ADC0 Conversion Complete Interrupt Priority Control.
This bit sets the priority of the ADC0 Conversion Complete interrupt.
0: ADC0 Conversion Complete interrupt set to low priority level.
1: ADC0 Conversion Complete interrupt set to high priority level.
PWADC0: ADC0 Window Comparator Interrupt Priority Control.
This bit sets the priority of the ADC0 Window interrupt.
0: ADC0 Window interrupt set to low priority level.
1: ADC0 Window interrupt set to high priority level.
RESERVED. Read = 0. Must Write 0.
PSMB0: SMBus (SMB0) Interrupt Priority Control.
This bit sets the priority of the SMB0 interrupt.
0: SMB0 interrupt set to low priority level.
1: SMB0 interrupt set to high priority level.
PCP1
R/W
Bit6
SFR Definition 8.10. EIP1: Extended Interrupt Priority 1
PCP0
R/W
Bit5
PCP0
R/W
Bit4
Rev. 1.7
PADC0
R/W
Bit3
PWADC0 Reserved
R/W
Bit2
R/W
Bit1
PSMB0
R/W
Bit0
SFR Address:
00000000
Reset Value
0xF6