C8051F310-TB Silicon Laboratories Inc, C8051F310-TB Datasheet - Page 143

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C8051F310-TB

Manufacturer Part Number
C8051F310-TB
Description
BOARD PROTOTYPING W/C8051F310
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F310-TB

Contents
Board
Processor To Be Evaluated
C8051F31x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F310
Silicon Family Name
C8051F31x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F310
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
V
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Note:
Bits7–5: UNUSED. Read = 000b; Write - don’t care.
Bits4–0: Output Configuration Bits for P3.4–P3.0 (respectively): ignored if corresponding bit in regis-
DD
= 2.7 to 3.6 V, –40 to +85 °C unless otherwise specified
Parameters
R/W
Bit7
-
Only P3.0–P3.4 are associated with Port pins on C8051F310/2/4 devices; Only P3.0 is associated with a
ter P3MDIN is logic 0.
0: Corresponding P3.n Output is open-drain.
1: Corresponding P3.n Output is push-pull.
Port pin on C8051F311/3/5/6/7 devices.
R/W
Bit6
-
SFR Definition 13.17. P3MDOUT: Port3 Output Mode
Table 13.1. Port I/O DC Electrical Characteristics
I
I
I
OH
OH
OH
R/W
Bit5
Weak Pullup On, V
-
= –10 mA, Port I/O push-pull
= –10 µA, Port I/O push-pull
= –3 mA, Port I/O push-pull
Weak Pullup Off
I
I
Conditions
OL
I
OL
OL
R/W
= 8.5 mA
Bit4
= 25 mA
= 10 µA
IN
Rev. 1.7
= 0 V
R/W
Bit3
C8051F310/1/2/3/4/5/6/7
R/W
V
Bit2
V
DD
DD
Min
2.0
– 0.7
– 0.1
R/W
Bit1
V
DD
Typ
1.0
25
– 0.8
R/W
Bit0
Max
0.8
0.6
0.1
±1
40
SFR Address:
00000000
Reset Value
0xA7
Units
µA
V
V
V
V
143

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