C8051F350DK Silicon Laboratories Inc, C8051F350DK Datasheet - Page 62

DEV KIT FOR F350/351/352/353

C8051F350DK

Manufacturer Part Number
C8051F350DK
Description
DEV KIT FOR F350/351/352/353
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F350DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F35x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F350
Silicon Family Name
C8051F35x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F350, 351, 352, 353
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1083

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F350DK
Manufacturer:
SiliconL
Quantity:
8
C8051F350/1/2/3
Table 5.3. ADC0 Electrical Characteristics (Continued)
V
Decimation Ratio = 1920, –40 to +85 °C unless otherwise noted.
62
Power Specifications
AV+ Supply Current to ADC0
AV+ Supply Current to Input Buffers
(Each Enabled Buffer)
Power Supply Rejection
*Note: Output Word Rate assuming Modulator Clock frequency = 2.4576 MHz
DD
Decimation
= AV+ = 3.0 V, VREF = 2.5 V External, PGA Gain = 1, MDCLK = 2.4576 MHz,
Ratio
1920
192
768
640
384
320
80
40
20
(sampling clock frequency = 19.2 kHz)
Parameter
Output Word
Table 5.4. ADC0 SINC3 Filter Typical RMS Noise (µV)
100 Hz
240 Hz
480 Hz
960 Hz
10 Hz
25 Hz
30 Hz
50 Hz
60 Hz
Rate*
2974
2.38
3.90
4.50
6.00
7.26
13.1
93.2
537
1
1586
1.23
2.04
2.39
3.21
3.96
47.7
7.11
267
Conditions
2
Rev. 1.1
0.68
1.14
1.31
1.86
2.32
4.24
24.8
135
771
4
PGA Gain Setting
0.41
0.68
0.81
1.20
1.51
2.85
13.9
69.5
379
8
Min
80
0.24
0.44
0.54
0.86
1.11
2.16
9.34
38.8
196
16
Typ
230
90
0.16
0.33
0.42
0.73
0.97
1.91
7.61
25.7
108
32
0.12
0.28
0.36
0.66
0.89
1.79
6.97
20.9
70.0
Max
650
125
64
0.11
0.27
0.36
0.66
0.89
1.77
6.67
18.9
45.4
128
Units
µA
µA
dB

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