ADM1041-EVAL Analog Devices Inc, ADM1041-EVAL Datasheet - Page 9
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ADM1041-EVAL
Manufacturer Part Number
ADM1041-EVAL
Description
BOARD EVALUATION ADM1041
Manufacturer
Analog Devices Inc
Datasheet
1.ADM1041AARQZ-REEL7.pdf
(64 pages)
Specifications of ADM1041-EVAL
Main Purpose
AC/DC, Secondary Side
Outputs And Type
1, Non-Isolated
Power - Output
24W
Voltage - Output
12V
Current - Output
2A
Voltage - Input
85 ~ 132VAC
Board Type
Fully Populated
Utilized Ic / Part
ADM1041
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Frequency - Switching
-
Regulator Topology
-
Lead Free Status / Rohs Status
Not Compliant
Parameter
CURRENT LIMIT ERROR AMPLIFIER
CURRENT SHARE DRIVER
CURRENT SHARE DIFFERENTIAL SENSE
AMPLIFIER
CURRENT SHARE ERROR AMPLIFIER
CURRENT LIMIT
CURRENT SHARE CAPTURE
FET OR GATE DRIVE
REVERSE VOLTAGE COMPARATOR, FS, FD
Current Limit Trim Range
Current Limit Trim Step
Current Limit Trim Step
Transconductance
Output Source Current
Output Sink Current
Output Voltage
Short Circuit Source Current
Source Current
Sink Current
V
V
Input Impedance
Gain
Transconductance, SHRS to SCMP
Output Source Current
Output Sink Current
Input Offset Voltage
Share OK Window Comparator Threshold
(Share Drive Error)
Current Limit Control Lower Threshold
Current Limit Control Upper Threshold
Current Share Capture Range
Capture Threshold
Output Low Level (On)
Output Leakage Current
Common-Mode Range
S
SHRS
– Input Voltage
Input Voltage
6
2
2
Min
105
100
V
65
100
40
1.3
0.7
1.4
2.1
2.8
0.6
−5
0.25
DD
– 0.4
Rev. A | Page 9 of 64
Typ
1.1
26.5
200
40
40
60
100
1.0
200
40
40
50
±100
±200
±300
±400
1
2
3
4
1.0
2.0
Max
130
300
55
15
100
0.5
V
300
60
3.5
1.3
2.6
3.9
5.2
1.4
0.4
0.8
+5
V
DD
DD
– 2
– 2
Unit
%
%
mV
µA/V
µA
µA
V
mA
mA
µA
V
V
kΩ
V/V
µA/V
µA
µA
mV
mV
mV
mV
mV
V
V
%
%
%
%
V
V
V
µA
V
Test Conditions/Comments
See Figure 13
After I
2.0 ≤ V
Reg 04h[7:3]. See Table 13.
I
V
V
See Figure 14.
R
Current at which V
by more than 5%
V
See Figure 14.
Voltage on Pin 20
Voltage on Pin 23
V
I
V
V
Master/slave arbitration
SHRS = 2 V ± SHR
Reg 04h[1:0] = 00. See Table 13.
Reg 04h[1:0] = 01. See Table 13.
Reg 04h[1:0] = 10. See Table 13.
Reg 04h[1:0] = 11. See Table 13.
Figure 10.
V
V
V
Reg 10h[5:4] = 00. See Table 25.
Reg 10h[5:4] = 01. See Table 25.
Reg 10h[5:4] = 10. See Table 25.
Reg 10h[5:4] = 11. See Table 25.
Open-drain N-channel FET
I
I
V
Voltage set by C
Voltage on C
CCMP
SCMP
IO
IO
L
CCMP
CCMP
SHARE
SHRS
SCMP
SCMP
CCMP
S
SCMP
CS−
+ = 0 V, V
= 1 kΩ, V
= 5 mA
= 10 mA
= FS
= ±20 µA
= ±20 µA. See Figure 12.
= 0.5 V, V
> 1 V
< V
= 3.5 V.
= > 1 V
= < V
= 0.7 V, V
SHARE
= 2.0 V
SHARE
DD
calibration
DD
SHRS
– 1 V
≤ 2.8 V typ. 5 bits, 31 steps.
SCMP
S
– 1 V
− pin. T
S
≤ V
S
− = 0.5 V
+ = 1.5 V
= 0 V
S
THRESH
resistor divider
DD
OUT
– 2 V
A
does not drop
= 25°C.
ADM1041