ADM1041-EVAL Analog Devices Inc, ADM1041-EVAL Datasheet - Page 40

• Manufacturer Part Number: ADM1041-EVAL
• Description: BOARD EVALUATION ADM1041
• Manufacturer: Analog Devices Inc

Specifications of ADM1041-EVAL

• Main Purpose: AC/DC, Secondary Side
• Outputs And Type: 1, Non-Isolated
• Power - Output: 24W
• Voltage - Output: 12V
• Current - Output: 2A
• Voltage - Input: 85 ~ 132VAC
• Board Type: Fully Populated
• Utilized Ic / Part: ADM1041
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Frequency - Switching: -
• Regulator Topology: -
• Lead Free Status / Rohs Status: Not Compliant

ADM1041
EXTENDED SMBus ADDRESSING
A potential problem exists when using more than three
ADM1041s in a single power supply. The first time the device is
powered up, Bit 1 of Configuration Register 1 (ADD1) is 0. This
means that only three device addresses are initially available
defined by ADD0; if there are more than three devices in a
system, two or more of them will have duplicate addresses. See
Figure 38.
To overcome this problem, the ICT pin has additional function-
ality. Taking ICT below GND temporarily disables the SMBus
function of the device. Thus, if the ICT pin of all devices in
which ADD1 is to remain 0 are taken negative, the ADD1 bits of
all other devices can be set to 1 via the SMBus. Each device then
has a unique address. Internal diodes clamp the negative voltage
to about 0.6 V, and care should be taken to limit the current to
less than approximately 5 mA on each ICT input to prevent the
possibility of damage or latch-up. The suggested current is
3 mA. One example of a suitable circuit is given in Figure 38. The
ADM1041s can then be configured and trimmed. If required,
AC_OKLink and PS
used for its intended purpose as a current transformer input,
care must be taken with the circuit design to allow the extended
SMBus addressing to work.
BACKDOOR ACCESS
After SCL and SDA have been configured as AC_OKLink and
PS
ADM1041. Changes may be necessary to the internal configura-
tion or trim bits. This is achieved by holding the SCL and SDA
pins at 0 V (ground) while cycling V
revert to SMBus operation. See Figure 38.
ON
LINK, it may be desired to recover the SMBus access to the
ON
LINK must be configured last. If ICT is
DD
. SCL and SDA then
Rev. A | Page 40 of 64
ADD1 = 1
ADD1 = 0
Figure 38. Extended SMBus Addressing and Backdoor Access
V
V
DD
DD
N/C
N/C
15
15
15
15
15
15
ADD0
ADD0
ADD0
ADD0
ADD0
ADD0
DEVICE 5
DEVICE 4
DEVICE 3
DEVICE 2
DEVICE 1
DEVICE 0
SDA
SDA
SDA
SDA
SDA
SDA
SCL
SCL
SCL
SCL
SCL
SCL
ICT
ICT
ICT
ICT
ICT
ICT
13
14
13
14
13
14
13
14
13
14
13
14
8
8
8
8
8
8
2.4mA
4kΩ
4kΩ
4kΩ
V
DD
BACKDOOR
–12V
AC_OKLink
PS
ON
EXTENDED
SMBus
ADDRESSING
Link