ADM1041-EVAL Analog Devices Inc, ADM1041-EVAL Datasheet - Page 22

• Manufacturer Part Number: ADM1041-EVAL
• Description: BOARD EVALUATION ADM1041
• Manufacturer: Analog Devices Inc

Specifications of ADM1041-EVAL

• Main Purpose: AC/DC, Secondary Side
• Outputs And Type: 1, Non-Isolated
• Power - Output: 24W
• Voltage - Output: 12V
• Current - Output: 2A
• Voltage - Input: 85 ~ 132VAC
• Board Type: Fully Populated
• Utilized Ic / Part: ADM1041
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Frequency - Switching: -
• Regulator Topology: -
• Lead Free Status / Rohs Status: Not Compliant

ADM1041
CURRENT SENSING
Current is typically sensed by a low value resistor in series with
the positive output of the power supply, just before the OrFET
or diode. For high voltages (12 V and higher), this resistor is
usually placed in the negative load. A pair of closely matched
voltage dividers connected to Pins 2 and 3 divide the common-
mode voltage down to approximately 2.0 V. The divider ratio
must be the same as used in the local and remote voltage sense
circuits. Alternatively, current may be sensed by a current
transformer (CT) connected to Pin 8. The ADM1041 must be
configured via the SMBus to select one or the other. See
Figure 13.
CURRENT TRANSFORMER INPUT
The ADM1041 can also be configured to sense current by using
a current transformer (CT) connected to Pin 8. In this case, the
resistive current sense is disabled. A separate single-ended
amplifier has two possible sensitivities that are selected via the
SMBus. If the CT option is selected, the gain of the 1.0, 2.1
buffer that follows the gain trim stage is no longer configurable
and is fixed at 1.0.
The share driver amplifier has a total of 100 mV positive offset
built into it. In order to use the ADM1041 in CT mode, it is
necessary to compensate for this additional 100 mV offset. This
is achieved by adding in a positive offset on the CT input. This
also allows any negative amplifier offsets in the CT chain to be
nulled out.
This offset cancellation is achieved by sourcing a current
through a resistance on the ICT pin. The resistor value is 40 kΩ
and so for 100 mV of offset cancellation a current of 2.5 µA is
required. It is possible to fine trim this current via Register 15h,
Bits 4–0, step size 170 nA. For example, 2.5 µA ≈ 15 × 170 nA;
so the code for Register 15h is decimal 15 or 0Fh. Refer to the
Current Transformer parameter in the Specifications table for
more details. See Figure 13.
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CURRENT SENSE CALIBRATION
Regardless of which means is used to sense the current, the end
result of the calibration process should produce the standard
current share signal between Pins 20 and 23, that is, 2.0 V at
100% load, excluding any additional share signal offset that
might be configured.
CURRENT LIMIT ERROR AMPLIFIER
This is a low gain transconductance amplifier that takes its
input from one of the calibrated current stages described
previously. The amplifier requires only the output pin for loop
compensation, which typically consists of a series RC network
to common. A trimmable reference provides a wide range of
adjustment for the current limit. When the current signal
reaches the reference voltage, the output of the error amplifier
comes out of saturation and begins to drive a controlled current
source. The control threshold is nominally 1.0 V. This current
flows through a resistor in series with the trimmed voltage loop
signal and thereby attempts to increase the voltage signal above
the 1.5 V reference for that loop. The closed voltage loop reacts
by reducing the power supply’s output voltage and this results in
constant current operation. See Figure 13.
OVERCURRENT PROTECTION
When the current limit threshold is reached, the OCP
comparator detects when the current error amplifier comes out
of saturation. Its threshold is nominally 0.5 V. This starts a timer
that, when it times out, causes an OCP condition to occur and
the power supply to shut down. If the current limit disappears
before the time has expired, the timer is reset. The time period
is configurable via the SMBus. Undervoltage blanking is applied
during the timer operation. See Figure 14.