EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 93
![BOARD EVAL W/CPU ADM6996M](/photos/9/10/91037/easy_6996m_cpu_sml.jpg)
EASY 6996M CPU
Manufacturer Part Number
EASY 6996M CPU
Description
BOARD EVAL W/CPU ADM6996M
Manufacturer
Infineon Technologies
Series
Samurair
Datasheet
1.EASY_6996M_CPU.pdf
(216 pages)
Specifications of EASY 6996M CPU
Main Purpose
Interface, Ethernet
Embedded
No
Utilized Ic / Part
ADM6996M
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Primary Attributes
-
Other names
EASY6996MCPUIN
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Field
LD135
MNA135
Res
AD024
LD024
MNA024
Similar Registers
Table 56
Register Short Name
P1EC
P2EC
P3EC
P4EC
P5EC
System Control Register 0
SC0
System Control Register 0
Data Sheet
Px_EC Registers
Bits
13
12:8
7
6
5
4:0
Register Long Name
P1 Extended Control Register
P2 Extended Control Register
P3 Extended Control Register
P4 Extended Control Register
P5 Extended Control Register
Type
rw
rw
r
rw
rw
rw
Description
Learning Disable
P1, P3, and P5.
0
1
Maximum Number of Addresses
Learned from the port (P1, P3, and P5).
Note: set value to Others = limit the number of addresses to be learned.
00000
Reserved
Aging Disable
P0, P2, and P4.
0
1
Learning Disable
P0, P2, and P4.
0
1
Maximum Number of Addresses
Learned from the port (P0, P2, and P4).
Note: set value to Others = limit the number of addresses to be learned.
00000
B
B
B
B
B
B
B
B
Learning function is enabled
Learning function is disabled
Aging function is enabled.
Aging function is disabled.
Learning function is enabled.
Learning function is disabled.
Doesn’t limit the number of addresses to be learned
Doesn’t limit the number of addresses to be learned
Offset
0A
93
H
Offset Address
02
04
04
06
06
H
H
H
H
H
Revision 1.4, 2006-03-24
Registers Description
Samurai-6M/MX
ADM6996M/MX
Page Number
Reset Value
5902
H
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