EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 15

• Manufacturer Part Number: EASY 6996M CPU
• Description: BOARD EVAL W/CPU ADM6996M
• Manufacturer: Infineon Technologies
• Series: Samurair

Specifications of EASY 6996M CPU

• Main Purpose: Interface, Ethernet
• Embedded: No
• Utilized Ic / Part: ADM6996M
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Primary Attributes: -
• Other names: EASY6996MCPUIN

Note:
Table 3
Ball No.
Network Media Connection
33
29
21
14
6
32
30
22
15
7
37
25
18
10
2
36
26
19
11
3
Port 4 MII Interface
74
102
Data Sheet
Table 1
IO Signals
can be used for reference.
Name
RXP_4
RXP_3
RXP_2
RXP_1
RXP_0
RXN_4
RXN_3
RXN_2
RXN_1
RXN_0
TXP_4
TXP_3
TXP_2
TXP_1
TXP_0
TXN_4
TXN_3
TXN_2
TXN_1
TXN_0
MMII_P4RXD0
PMII_P4RXD0
MMII_P4RXD3
PMII_P4RXD3
Pin
Type
AI/O
AI/O
AI/O
AI/O
I
O
I
O
Buffer
Type
ANA
ANA
ANA
ANA
PD,
LVTTL
8 mA,
PD,
LVTTL
PD,
LVTTL
8 mA,
PD,
LVTTL
Function
Receive Pair
Differential data is received on this pin.
Transmit Pair
Differential data is transmitted on this pin.
Port 4 Receive Data Bit 0 in MAC MII Mode
In MAC MII mode, the bit is the LSB of MII receive data,
synchronous to the rising edge of MMII_P4RXCLK.
Port 4 Receive Data Bit 0 in PCS MII Mode
When port 4 is operating in PCS MII mode, the bit is the
LSB of MII receive data output and synchronous to the
rising edge of PMII_P4RXCLK.
Port 4 Receive Data Bit 3 in MAC MII Mode
In MAC MII mode, this bit is bit[3] of MII receive data, and
synchronous to the rising edge of MMII_P4RXCLK.
Port 4 Receive Data Bit 3 in PCS MII Mode
When port 4 is operating in PCS MII mode, this pin is bit[3]
of MII receive data output and synchronous to the rising
edge of PMII_P4RXCLK.
15
Revision 1.4, 2006-03-24
Interface Description
Samurai-6M/MX
ADM6996M/MX