EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 132

• Manufacturer Part Number: EASY 6996M CPU
• Description: BOARD EVAL W/CPU ADM6996M
• Manufacturer: Infineon Technologies
• Series: Samurair

Specifications of EASY 6996M CPU

• Main Purpose: Interface, Ethernet
• Embedded: No
• Utilized Ic / Part: ADM6996M
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Primary Attributes: -
• Other names: EASY6996MCPUIN

Field
R3BW_TH3
R2BW_TH3
R1BW_TH3
R0BW_TH3
Extended Bandwidth Control Register 5
EBC5
Extended Bandwidth Control Register 5
Field
FMDIX1
T3BW_TH3
T2BW_TH3
T1BW_TH3
T0BW_TH3
R5BW_TH3
Default VLAN Member and Extended Bandwidth Control Register 6
Data Sheet
Bits
11:9
8:6
5:3
2:0
Bits
15
14:12
11:9
8:6
5:3
2:0
Type
rw
rw
rw
rw
Type
r
rw
rw
rw
rw
rw
Description
Port 3 Receive Bandwidth Maximum[10:8].
See register 0033
Port 2 Receive Bandwidth Maximum[10:8].
See register 0033
Port 1 Receive Bandwidth Maximum[10:8].
See register 0033
Port 0 Receive Bandwidth Maximum[10:8].
See register 0033
Description
Port 1 MDIX Control
This bit can be used for Port 1 MDI/MDIX selection. It is useful when Port
1 Crossover Auto Detect is disabled and 16 bits management interface
(SDC/SDIO) is used.
0
1
Port 3 Transmit Bandwidth Maximum[10:8].
See register 0033
Port 2 Transmit Bandwidth Maximum[10:8].
See register 0033
Port 1 Transmit Bandwidth Maximum[10:8].
See register 0033
Port 0 Transmit Bandwidth Maximum[10:8].
See register 0033
Port 5 Receive Bandwidth Maximum[10:8].
See register 0033
B
B
Using MDI
Using MDIX
Offset
39
132
H
H
H
H
H
H
H
H
H
H
,
,
,
,
,
,
,
,
,
P3RBCE
P2RBCE
P1RBCE
P0RBCE
P3TBCE
P2TBCE
P1TBCE
P0TBCE
P5RBCE
for more details.
for more details.
for more details.
for more details.
for more details.
for more details.
for more details.
for more details.
for more details.
Revision 1.4, 2006-03-24
Registers Description
Samurai-6M/MX
ADM6996M/MX
Reset Value
0000
H