EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 186
EASY 6996M CPU
Manufacturer Part Number
EASY 6996M CPU
Description
BOARD EVAL W/CPU ADM6996M
Manufacturer
Infineon Technologies
Series
Samurair
Datasheet
1.EASY_6996M_CPU.pdf
(216 pages)
Specifications of EASY 6996M CPU
Main Purpose
Interface, Ethernet
Embedded
No
Utilized Ic / Part
ADM6996M
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Primary Attributes
-
Other names
EASY6996MCPUIN
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Field
COUNTER
4.4
PHY Control Register of Port 0
PHY_C0
PHY Control Register of Port 0
Field
RST
LPBK
SPEED_LSB
Data Sheet
PHY Registers
Bits
15:0
Bits
15
14
13
Type
r
Type
rw, sc
rw
rw
Description
Counter [31:16]
Description
RESET
Setting this bit initiates the software reset function that resets the selected
port, except for the phase-locked loop circuit. It will re-latch in all
hardware configuration pin values The software reset process takes
25
until the reset process is complete.
0
1
Loop Back Enable
This bit controls the PHY loopback operation that isolates the network
transmitter outputs (TXP and TXN) and routes the MII transmit data to the
MII receive data path. This function should only be used when auto
negotiation is disabled (bit 12 = 0). The specific PHY (10Base-T or
100Base-X) used for this operation is determined by bits 12 and 13 of this
register
0
1
Speed Selection LSB, 0.6, 0.13
Link speed is selected by this bit or by auto negotiation if bit 12 of this
register is set (in which case, the value of this bit is ignored).If it is fiber
mode, 0.13 is always 1. Any write to this bit will have no effect.
00
01
10
11
B
B
B
B
B
B
B
B
s to complete. This bit, which is self-clearing, returns a value of 1
Normal operation
PHY Reset
Disable Loopback mode
Enable loopback mode
10 Mbit/s
100 Mbit/s
1000 Mbit/s
Reserved
Offset
200
186
H
Revision 1.4, 2006-03-24
Registers Description
Samurai-6M/MX
ADM6996M/MX
Reset Value
3100
H
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