DTMFDECODER-RD Silicon Laboratories Inc, DTMFDECODER-RD Datasheet - Page 160
![KIT REF DESIGN DTMF DECODER](/photos/9/6/90685/dtmfdecoder-rd_sml.jpg)
DTMFDECODER-RD
Manufacturer Part Number
DTMFDECODER-RD
Description
KIT REF DESIGN DTMF DECODER
Manufacturer
Silicon Laboratories Inc
Specifications of DTMFDECODER-RD
Mfg Application Notes
DTMF Decoder Ref Design AppNote
Main Purpose
Telecom, DTMF Decoder
Embedded
No
Utilized Ic / Part
C8051F300
Primary Attributes
8kHz Sampling Rate ADC
Secondary Attributes
16 Goertzel Filters
Processor To Be Evaluated
C8051F300
Interface Type
RS-232
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
336-1283
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C8051F300/1/2/3/4/5
16.2.3. High Speed Output Mode
In High Speed Output mode, a module’s associated CEXn pin is toggled each time a match occurs
between the PCA Counter and the module's 16-bit capture/compare register (PCA0CPHn and
PCA0CPLn) Setting the TOGn, MATn, and ECOMn bits in the PCA0CPMn register enables the High-
Speed Output mode.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Capture/
Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit
to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’.
160
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
Figure 16.6. PCA High Speed Output Mode Diagram
0
ENB
ENB
1
PCA
Timebase
Enable
W
M
P
1
6
n
x
E
C
O
M
PCA0CPLn
n
PCA0CPMn
C
A
P
P
n
0 0
PCA0L
C
A
P
N
n
16-bit Comparator
M
A
T
n
O
G
T
n
W
M
P
0 x
n
E
C
C
F
n
PCA0CPHn
PCA0H
Rev. 2.9
Match
Toggle
C
F
C
R
PCA0CN
TOGn
0
1
0
1
C
C
F
2
CEXn
C
C
F
1
C
C
F
0
PCA Interrupt
Crossbar
Port I/O
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