DTMFDECODER-RD Silicon Laboratories Inc, DTMFDECODER-RD Datasheet - Page 124

KIT REF DESIGN DTMF DECODER

DTMFDECODER-RD

Manufacturer Part Number
DTMFDECODER-RD
Description
KIT REF DESIGN DTMF DECODER
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of DTMFDECODER-RD

Mfg Application Notes
DTMF Decoder Ref Design AppNote
Main Purpose
Telecom, DTMF Decoder
Embedded
No
Utilized Ic / Part
C8051F300
Primary Attributes
8kHz Sampling Rate ADC
Secondary Attributes
16 Goertzel Filters
Processor To Be Evaluated
C8051F300
Interface Type
RS-232
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
336-1283
C8051F300/1/2/3/4/5
13.5.2. Master Receiver Mode
Serial data is received on SDA while the serial clock is output on SCL. The SMBus interface generates the
START condition and transmits the first byte containing the address of the target slave and the data direc-
tion bit. In this case the data direction bit (R/W) will be logic 1 (READ). Serial data is then received from the
slave on SDA while the SMBus outputs the serial clock. The slave transmits one or more bytes of serial
data. After each byte is received, ACKRQ is set to ‘1’ and an interrupt is generated. Software must write
the ACK bit (SMB0CN.1) to define the outgoing acknowledge value (Note: writing a ‘1’ to the ACK bit gen-
erates an ACK; writing a ‘0’ generates a NACK). Software should write a ‘0’ to the ACK bit after the last
byte is received, to transmit a NACK. The interface exits Master Receiver Mode after the STO bit is set and
a STOP is generated. Note that the interface will switch to Master Transmitter Mode if SMB0DAT is written
while an active Master Receiver. Figure 13.6 shows a typical Master Receiver sequence. Two received
data bytes are shown, though any number of bytes may be received. Notice that the ‘data byte transferred’
interrupts occur before the ACK cycle in this mode.
124
Interrupt
S
Figure 13.6. Typical Master Receiver Sequence
Received by SMBus
Interface
Transmitted by
SMBus Interface
SLA
R
Interrupt
A
Data Byte
Rev. 2.9
Interrupt
A
S = START
P = STOP
A = ACK
N = NACK
R = READ
SLA = Slave Address
Data Byte
Interrupt
N
P

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