MA240017 Microchip Technology, MA240017 Datasheet - Page 62

MODULE PLUG-IN PIC24F16KA102 PIM

MA240017

Manufacturer Part Number
MA240017
Description
MODULE PLUG-IN PIC24F16KA102 PIM
Manufacturer
Microchip Technology
Series
PIC®r
Datasheets

Specifications of MA240017

Accessory Type
Plug-In Module (PIM) - PIC24F16KA102
Product
Microcontroller Modules
Data Bus Width
16 bit
Core Processor
PIC24F16KA102
Operating Supply Voltage
3 V to 3.6 V
Development Tools By Supplier
Integrated Development Environment, Assembler, ANSI C Compiler
Processor Series
PIC24F
Silicon Manufacturer
Microchip
Core Architecture
PIC
Core Sub-architecture
PIC24
Silicon Core Number
PIC24F
Silicon Family Name
PIC24FxxKAxx
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
Explorer 16 (DM240001 or DM240002)
For Use With
DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MA240017
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC24F16KA102 FAMILY
7.2
The Reset times for various types of device Reset are
summarized in Table 7-3. Note that the system Reset
signal, SYSRST, is released after the POR and PWRT
delay times expire.
The time at which the device actually begins to execute
code will also depend on the system oscillator delays,
which include the Oscillator Start-up Timer (OST) and
the PLL lock time. The OST and PLL lock times occur
in parallel with the applicable SYSRST delay times.
TABLE 7-3:
DS39927B-page 60
POR
BOR
All Others
Note 1:
Note:
Reset Type
(6)
2:
3:
4:
5:
6: If Two-Speed Start-up is enabled, regardless of the Primary Oscillator selected, the device starts with FRC,
Device Reset Times
and in such cases, FRC start-up time is valid.
T
T
T
T
T
oscillator clock to the system.
For detailed operating frequency and timing specifications, see Section 29.0 “Electrical Characteristics”.
OST
POR
PWRT
FRC
LOCK
and T
= Oscillator Start-up Timer (OST). A 10-bit counter waits 1024 oscillator periods before releasing
= Power-on Reset delay.
RESET DELAY TIMES FOR VARIOUS DEVICE RESETS
= PLL lock time.
= 64 ms nominal if the Power-up Timer is enabled; otherwise, it is zero.
EC
FRC, FRCDIV
LPRC
ECPLL
FRCPLL
XT, HS, SOSC
XTPLL, HSPLL
EC
FRC, FRCDIV
LPRC
ECPLL
FRCPLL
XT, HS, SOSC
XTPLL, HSPLL
Any Clock
LPRC
= RC Oscillator start-up times.
Clock Source
Preliminary
SYSRST Delay
T
T
T
T
T
T
T
POR
POR
POR
POR
POR
POR
POR
The FSCM delay determines the time at which the
FSCM begins to monitor the system clock source after
the SYSRST signal is released.
T
T
T
T
T
T
T
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
+ T
+ T
+ T
+ T
+ T
+ T
+ T
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
System Clock
T
T
T
T
© 2009 Microchip Technology Inc.
OST
FRC
FRC
FRC
T
T
T
T
Delay
T
T
T
T
LPRC
LOCK
LPRC
LOCK
+ T
+ T
OST
+ T
OST
+ T
FRC
FRC
LOCK
LOCK
LOCK
LOCK
1, 2
1, 2, 3
1, 2, 3
1, 2, 4
1, 2, 3, 4
1, 2, 5
1, 2, 4, 5
2
2, 3
2, 3
2, 4
2, 3, 4
2, 5
2, 3, 4
Notes
None

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