IDT72T55248L5BB IDT, Integrated Device Technology Inc, IDT72T55248L5BB Datasheet - Page 60

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IDT72T55248L5BB

Manufacturer Part Number
IDT72T55248L5BB
Description
IC CTRL QUADMUX FLOW 324-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT72T55248L5BB

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72T55248L5BB
ERCLK0
NOTES:
1. The EREN0 output is “or gated” to RCS0 and REN0 and will follow these inputs provided that the Queue is not empty. If the Queue is empty, EREN0 will go HIGH to indicate that
2. The EREN0 output is synchronous to RCLK0.
3. OE0 = LOW, WDDR = HIGH, and RDDR = HIGH.
4. Q[39:10] = 0.
5. The truth table for EREN is shown below:
Figure 32. Echo Read Clock and Read Enable Operation (Mux/Demux/Broadcast mode, IDT Standard mode, SDR to SDR) x10 In to x10 Out
IDT72T55248/72T55258/72T55268 2.5V QuadMux DDR Flow-Control Device with
Mux/Demux/Broadcast functions 8K x 40 x 4, 16K x 40 x 4 and 32K x 40 x 4
EREN0
RCLK0
REN0
RCS0
Q[9:0]
there is no new word available.
RCLK
EF0
EF
1
1
1
1
0
t
ENS
RCS
X
0
0
1
1
t
OLZ
t
A
t
CLKEN
t
ERCLK
REN
X
0
1
0
1
W
D-4
EREN
0
1
1
1
1
t
A
t
CLKEN
W
D-3
60
t
A
t
CLKEN
W
D-2
t
A
COMMERCIAL AND INDUSTRIAL
W
TEMPERATURE RANGES
D-1
FEBRUARY 01, 2009
t
A
t
REF
W
D Last Word
6157 drw29

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