IDT72T55248L5BB IDT, Integrated Device Technology Inc, IDT72T55248L5BB Datasheet - Page 14

• Manufacturer Part Number: IDT72T55248L5BB
• Description: IC CTRL QUADMUX FLOW 324-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72T55248L5BB

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72T55248L5BB

IDT72T55248/72T55258/72T55268 2.5V QuadMux DDR Flow-Control Device with
Mux/Demux/Broadcast functions 8K x 40 x 4, 16K x 40 x 4 and 32K x 40 x 4
SET-UP, CONFIGURATION & RESET PINS
following inputs must always be used. These inputs must be set-up with respect
to master reset as they are latched during master reset.
WDDR – Write Port DDR/SDR selection
RDDR – Read Port DDR/SDR selection
MD[1:0] – Mode Selection
OW[1:0] – Output width
IW[1:0] – Input Width
FSEL[1:0] – Flag offset default values
IOSEL – I/O Level Selection
PFM – Programmable Flag Mode
FWFT/SI – First word Fall Through or Standard IDT mode flag timing selection
MUX MODE
by the user:
INPUTS:
WCLK0, WCLK1, WCLK2, WCLK3 – Four write port clocks
WEN0, WEN1, WEN2, WEN3 – Four write port enables
WCS0, WCS1, WCS2, WCS3 – Four write port chip selects
OS[1:0] - Output Select
RCLK0 – Read port clock
REN0 – Read port enable
RCS0 – Read port chip select
OE0 – Read port output enable
OUTPUTS:
ERCLK0 – Read port echo read clock
EREN0 – Read port echo read enable
EF0/OR0, EF1/OR1, EF2/OR2, EF3/OR3 – Four read port empty/output
ready flags
PAE0, PAE1, PAE2, PAE3 – Four read port programmable almost empty flags
PAF0, PAF1, PAF2, PAF3 – Four write port programmable almost full flags
FF0/IR0, FF1/IR1, FF2/IR2, FF3/IR3 – Four write port full/ input ready flags
CEF/COR – Composite empty/output ready flag on read port
Regardless of the mode of operation, (Mux, Demux or Broadcast), the
The following inputs/ outputs should be used when Mux mode is selected
QUADMUX I/O USAGE SUMMARY
14
DEMUX OR BROADCAST MODE
Write mode is selected by the user:
INPUTS:
IS[1:0] - Input Select, Demux mode only, not used in broadcast mode.
WCLK0 – Write port clock
WEN0 – Write port enable
WCS0 – Write port chip select
RCLK0, RCLK1, RCLK2, RCLK3 – Four read port clocks
REN0, REN1, REN2, REN3 – Four read port enables
RCS0, RCS1, RCS2, RCS3 – Four read port chip selects
OE0, OE1, OE2, OE3 – Four read port output enables
OUTPUTS:
ERCLK0, ERCLK1, ERCLK2, ERCLK3 – Four read port echo read clock
outputs
EREN0, EREN1, EREN2, EREN3 – Four read port echo read enable outputs
EF0/OR0, EF1/OR1, EF2/OR2, EF3/OR3 – Four read port empty/output
ready flags
FF0/IR0, FF1/IR1, FF2/IR2, FF3/IR3 – Four write port full/input ready flags
PAF0, PAF1, PAF2, PAF3 – Four write port programmable almost full flags
PAE0, PAE1, PAE2, PAE3 – Four read port programmable almost empty flags
CFF/CIR – Composite full/ input ready flag on write port
SERIAL PORT
Offsets values:
SCLK – Serial Clock
SWEN – Serial Write Enable
SREN – Serial Read Enable
FWFT/SI – Serial Data In
SDO – Serial Data Out
The following inputs/outputs should be used when Demux or Broadcast
The following pins are used for writing and reading the Programmable Flag
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
FEBRUARY 01, 2009