IDT72T55248L5BB IDT, Integrated Device Technology Inc, IDT72T55248L5BB Datasheet - Page 59
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IDT72T55248L5BB
Manufacturer Part Number
IDT72T55248L5BB
Description
IC CTRL QUADMUX FLOW 324-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT72T55248L6-7BB.pdf
(65 pages)
Specifications of IDT72T55248L5BB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72T55248L5BB
NOTE:
1. The O/P Register is the internal output register. Its contents are available on the Qn output bus only when RCS0 and OE0 are both active, LOW, that is the bus is not in
2. OE0 is LOW.
3. Q[39:10] = 0.
Cycle:
a&b. At this point the Queue is empty, OR0 is HIGH.
c.
d .
e.
f.
g .
h .
i .
4. OE0 is LOW, WDDR = LOW, and RDDR = LOW.
5. The truth table for EREN is shown below:
IDT72T55248/72T55258/72T55268 2.5V QuadMux DDR Flow-Control Device with
Mux/Demux/Broadcast functions 8K x 40 x 4, 16K x 40 x 4 and 32K x 40 x 4
ERCLK0
WCLK0
RCLK0
EREN0
High-Impedance state.
WEN0
D[9:0]
REN0
RCS0
Q[9:0]
O/P
OR0
Reg.
RCS0 and REN0 are both disabled, the output bus is High-Impedance.
Word Wn+1 falls through to the output register, OR0 goes active, LOW.
RCS0 is HIGH, therefore the Qn outputs are High-Impedance. EREN0 goes LOW to indicate that a new word has been placed into the output register.
EREN0 goes HIGH, no new word has been placed on the output register into this cycle.
No Operation.
RCS0 is LOW on this cycle, therefore the Qn outputs go to Low-Impedance and the contents of the output register (Wn+1) are made available.
NOTE: In FWFT mode it is important to take RCS0 active LOW at least one cycle ahead of REN0, this ensures the word (Wn+1) currently in the output register is made
available for at least one cycle, otherwise Wn+1 will overwritten by Wn+2.
REN0 goes active LOW, this reads out the second word, Wn+2.
EREN0 goes active LOW to indicate a new word has been placed into the output register.
Word Wn+3 is read out, EREN0 remains active, LOW indicating a new word has been read out.
NOTE: Wn+3 is the last word in the Queue.
This is the next enabled read after the last word, Wn+3 has been read out. OR0 flag goes HIGH and EREN0 goes HIGH to indicate that there is no new word available.
(1)
RCLK
↑
↑
↑
↑
↑
Figure 31. Echo RCLK and Echo Read Enable Operation (Mux/Demux/Broadcast mode, FWFT mode, SDR to SDR)
HIGH-Z
OR
0
0
0
0
1
t
ENS
t
RCS
DS
X
0
0
1
1
W
t
ERCLK
n+1
W
t
DH
n
t
Last Word
SKEW1
REN
0
1
0
1
X
t
DS
a
W
n+2
t
EREN
DH
0
1
1
1
1
1
b
t
DS
W
n+3
t
DH
2
t
ENH
c
t
t
REF
CLKEN
59
d
t
CLKEN
e
W
n+1
t
ENS
t
ENH
f
t
RCSLZ
t
ENS
W
n+1
g
t
COMMERCIAL AND INDUSTRIAL
t
A
CLKEN
W
W
n+2
n+2
TEMPERATURE RANGES
h
t
A
FEBRUARY 01, 2009
W
W
i
n+3
t
n+3
ENH
t
t
REF
CLKEN
6157 drw28