MT46H8M16LFCF-10 Micron Technology Inc, MT46H8M16LFCF-10 Datasheet - Page 62

IC DDR SDRAM 128MBIT 60VFBGA

MT46H8M16LFCF-10

Manufacturer Part Number
MT46H8M16LFCF-10
Description
IC DDR SDRAM 128MBIT 60VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheets

Specifications of MT46H8M16LFCF-10

Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
128M (8Mx16)
Speed
100MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
60-VFBGA
Organization
8Mx16
Density
128Mb
Address Bus
15b
Access Time (max)
7ns
Maximum Clock Rate
104MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
90mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT46H8M16LFCF-10
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT46H8M16LFCF-10 IT
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT46H8M16LFCF-10 IT TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT46H8M16LFCF-10 TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 39:
PDF: 09005aef8199c1ec/Source: 09005aef81a19319
MT46H8M16LF_1.fm - Rev. K 7/07 EN
COMMAND
Case 1:
Case 2:
BA0, BA1
A0–A9
t
DQS
t
DQS
DQ
DQ
CK#
CKE
A11
A10
DM
AC (MIN) and
AC (MAX) and
CK
4
1
1
Bank Read – with Auto Precharge
t
t
IS
IS
NOP
T0
t
DQSCK (MIN)
t
t
DQSCK (MAX)
6
Notes:
t
IH
IH
Bank x
t
t
IS
IS
6
1. D
2. BL = 4 in the case shown.
3. Enable auto precharge.
4. PRE = PRECHARGE, ACT = ACTIVE, RA = Row address, BA = Bank address.
5. NOP commands are shown for ease of illustration; other commands may be valid at these
6. Refer to Figure 31 on page 55 and Figure 32 on page 56 for detailed DQS and DQ timing.
ACT
RA
RA
T1
RA
6
t
t
times.
IH
IH
t
OUT
CK
t
t
n = data-out from column n.
RAS
RCD
t
RC
NOP
T2
5
t
CH
t
CL
t
3
IS
Bank x
READ
Col n
t
LZ (MIN)
T3
2
t
IH
62
t
CL = 2
RPRE
t
t
LZ (MIN)
AC (MIN)
NOP
T4
5
t
128Mb: 8 Meg x 16 Mobile DDR SDRAM
AC (MAX)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
D
RPRE
OUT
n
t
DQSCK (MIN)
NOP
D
n + 1
T5
OUT
D
t
OUT
n
DQSCK (MAX)
5
T5n
D
n + 2
OUT
D
n + 1
OUT
t
RP
NOP
TRANSITIONING DATA
D
n + 3
T6
t
D
n + 2
RPST
OUT
OUT
5
T6n
t
HZ (MAX)
©2004 Micron Technology, Inc. All rights reserved.
D
n + 3
t
RPST
OUT
Timing Diagrams
NOP
T7
5
DON’T CARE
Bank x
ACT
T8
RA
RA
RA

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