MT46H8M16LFCF-10 Micron Technology Inc, MT46H8M16LFCF-10 Datasheet - Page 42

IC DDR SDRAM 128MBIT 60VFBGA

MT46H8M16LFCF-10

Manufacturer Part Number
MT46H8M16LFCF-10
Description
IC DDR SDRAM 128MBIT 60VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheets

Specifications of MT46H8M16LFCF-10

Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
128M (8Mx16)
Speed
100MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
60-VFBGA
Organization
8Mx16
Density
128Mb
Address Bus
15b
Access Time (max)
7ns
Maximum Clock Rate
104MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
90mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT46H8M16LFCF-10
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT46H8M16LFCF-10 IT
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT46H8M16LFCF-10 IT TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT46H8M16LFCF-10 TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Truth Tables
Table 8:
PDF: 09005aef8199c1ec/Source: 09005aef81a19319
MT46H8M16LF_1.fm - Rev. K 7/07 EN
CKE
H
H
H
H
H
L
L
L
L
L
L
n-1
CKE
H
H
H
H
H
L
L
L
L
L
L
Truth Table – CKE
Notes: 1–5
n
(Precharge) Power-Down
(Precharge) Power-Down
Notes:
(Active) Power-Down
(Active) Power-Down
Current State
Bank(s) active
All banks idle
All banks idle
Self refresh
Self refresh
1. CKE
2. Current state is the state of the DDR SDRAM immediately prior to clock edge n.
3. COMMAND
4. All states and sequences not shown are illegal or reserved.
5.
6. DESELECT or NOP commands should be issued on any clock edges occurring during the
7. The clock must toggle at least once during the
8. DESELECT or NOP commands should be issued on any clock edges occurring during the
9. The clock must toggle at least once during the
edge.
COMMAND
t
period.
period.
CKE pertains.
n
is the logic state of CKE at clock edge n
n
n
.
is the command registered at clock edge n
See Table 10 on page 45
See Table 10 on page 45
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
AUTO REFRESH
COMMAND
X
X
X
42
n
128Mb: 8 Meg x 16 Mobile DDR SDRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
; CKE
Maintain (precharge) power-down
t
t
XP period.
XSR period.
n-1
(Precharge) power-down entry
Maintain (active) power-down
Exit (precharge) power-down
(Active) power-down entry
Exit (active) power-down
was the state of CKE at the previous clock
Maintain self refresh
,
and ACTION
Self refresh entry
Exit self refresh
ACTION
©2004 Micron Technology, Inc. All rights reserved.
n
n
is a
result of
Truth Tables
Notes
6, 7
6, 7
8, 9
t
t
XSR
XP

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