HUF76639S3ST_F085 Fairchild Semiconductor, HUF76639S3ST_F085 Datasheet - Page 7

• Manufacturer Part Number: HUF76639S3ST_F085
• Description: MOSFET 50A, 100V, 0.026 Ohm N-Channel UltraFET
• Manufacturer: Fairchild Semiconductor

Specifications of HUF76639S3ST_F085

• Rohs: yes
• Transistor Polarity: N-Channel
• Drain-source Breakdown Voltage: 100 V
• Continuous Drain Current: 50 A
• Resistance Drain-source Rds (on): 0.026 Ohms
• Maximum Operating Temperature: + 175 C
• Mounting Style: SMD/SMT
• Package / Case: TO-263AB
• Fall Time: 136 ns
• Gate Charge Qg: 86 nC
• Minimum Operating Temperature: - 55 C
• Power Dissipation: 180 W
• Rise Time: 207 ns
• Typical Turn-off Delay Time: 83 ns

PSPICE Electrical Model
.SUBCKT HUF76639 2 1 3 ;
CA 12 8 4.2e-9
CB 15 14 4.2e-9
CIN 6 8 2.27e-9
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 118.2
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
LDRAIN 2 5 1.0e-9
LGATE 1 9 5.1e-9
LSOURCE 3 7 3.1e-9
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 15.8e-3
RGATE 9 20 1.94
RLDRAIN 2 5 10
RLGATE 1 9 51
RLSOURCE 3 7 31
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 3.6e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*99),3.5))}
.MODEL DBODYMOD D (IS = 2.6e-12 RS = 2.65e-3 IKF = 6 TRS1 = 1.5e-3 TRS2 = 3.5e-6 CJO = 2.1e-9 TT = 5.6e-8 M = 0.52)
.MODEL DBREAKMOD D (RS = 2.5e-1 TRS1 = 1e-4 TRS2 = -1e-6)
.MODEL DPLCAPMOD D (CJO = 2.6e-9 IS = 1e-30 M = 0.89 N = 10)
.MODEL MMEDMOD NMOS (VTO = 1.77 KP = 7 IS = 1e-30 N = 10 TOX = 1 L = 1U W = 1U RG = 1.94)
.MODEL MSTROMOD NMOS (VTO = 2.06 KP = 95 IS = 1e-30 N = 10 TOX = 1 L = 1U W = 1U)
.MODEL MWEAKMOD NMOS (VTO = 1.48 KP = 0.12 IS = 1e-30 N = 10 TOX = 1 L = 1U W = 1U RG = 19.4 RS = .1)
.MODEL RBREAKMOD RES (TC1 = 1.05e-3 TC2 = -5e-7)
.MODEL RDRAINMOD RES (TC1 = 8.5e-3 TC2 = 2.3e-5)
.MODEL RSLCMOD RES (TC1 = 3.4e-3 TC2 = 2.5e-6)
.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-6)
.MODEL RVTHRESMOD RES (TC1 = -1.9e-3 TC2 = -4.5e-6)
.MODEL RVTEMPMOD RES (TC1 = -1.7e-3 TC2 = 1.5e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.5 VOFF = -2.0)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.0 VOFF = -4.5)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.5 VOFF = 0.3)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.3 VOFF = -0.5)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
©2012 Fairchild Semiconductor Corporation
GATE
1
rev 26 July 1999
RLGATE
LGATE
9
RGATE
CA
12
20
+
EVTEMP
S1A
S1B
ESG
18
22
EGS
13
8
+
-
-
13
6
8
10
+
+
-
-
14
13
6
8
6
RSLC2
S2A
S2B
DPLCAP
EVTHRES
+
EDS
19
8
15
CB
CIN
-
+
-
5
8
51
5
5
MSTRO
+
-
14
51
21
RDRAIN
RSLC1
50
ESLC
16
8
MMED
8
EBREAK
IT
DBREAK
RSOURCE
17
MWEAK
RVTHRES
RBREAK
11
+
-
17
18
7
+
-
18
22
RVTEMP
19
RLSOURCE
DBODY
LSOURCE
VBAT
RLDRAIN
LDRAIN
HUF76639S3ST_F085 Rev. C1
SOURCE
DRAIN
2
3