BR24L02-W Rohm Semiconductor, BR24L02-W Datasheet

IC EEPROM 2KBIT 400KHZ 8DIP

BR24L02-W

Manufacturer Part Number
BR24L02-W
Description
IC EEPROM 2KBIT 400KHZ 8DIP
Manufacturer
Rohm Semiconductor
Datasheet

Specifications of BR24L02-W

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
BR24L02-W
Manufacturer:
ROHM
Quantity:
50
High Reliability Series Serial EEPROM Series
I
Serial EEPROMs
BR24L□□-W Series
BR24L01A-W, BR24L02-W, BR24L04-W, BR24L08-W,
BR24L16-W, BR24L32-W, BR24L64-W
BR24S□□□-W Series
BR24S16-W, BR24S32-W, BR24S64-W, BR24S128-W, BR24S256-W
2
ROHM's series of serial EEPROMs represent the highest level of reliability on the market. A double cell structure provides a
failsafe method of data reliability, while a double reset function prevents data miswriting. In addition, gold pads and gold
wires are used for internal connections, pushing the boundaries of reliability to the limit.
BR24L□□-W Series assort 1Kbit~64Kbit. BR24S□□□-W Series are possible to operate at high speed in low voltage and
assort 16Kbit~256Kbit.
C BUS
BR24L□□-W Series
BR24S□□□-W Series
BR24L01A-W, BR24L02-W, BR24L04-W, BR24L08-W,
BR24L16-W, BR24L32-W, BR24L64-W
BR24S16-W, BR24S32-W, BR24S64-W,
BR24S128-W, BR24S256-W
TECHNICAL NOTE
Contents
・・・・P2
・・・・P17
Apr. 2008

Related parts for BR24L02-W

BR24L02-W Summary of contents

Page 1

... BR24L□□-W Series assort 1Kbit~64Kbit. BR24S□□□-W Series are possible to operate at high speed in low voltage and assort 16Kbit~256Kbit. BR24L□□-W Series BR24L01A-W, BR24L02-W, BR24L04-W, BR24L08-W, BR24L16-W, BR24L32-W, BR24L64-W BR24S□□□-W Series BR24S16-W, BR24S32-W, BR24S64-W, ...

Page 2

... I C BUS Serial EEPROMs BR24L□□-W Series BR24L01A-W, BR24L02-W, BR24L04-W, BR24L08-W, BR24L16-W, BR24L32-W, BR24L64-W ●Description BR24L□□-W series is a serial EEPROM of I ●Features ・ Completely conforming to the world standard I data(SDA) ・ Other devices than EEPROM can be connected to the same port, saving microcontroller port *1 ・ ...

Page 3

... BR24L02/16/32-W : 1.7~5.5V *2 Not 100% tested *1 Unit Max. - Times - Years Unit *1 V Unit kHz μs μs μs μs μs μ μ ...

Page 4

... Stop condition Fig.1-(c) Write cycle timing ●Block diagram * 7bit 8bit 9bit 10bi *2 Address A1 2 decoder * High voltage GND 4 generating circuit 1 * 7bit : BR24L01A-W 8bit : BR24L02-W 9bit : BR24L04-W ●Pin assignment and description Terminal Vcc BR24L01A-W BR24L02 BR24L04-W BR24L08 SCL BR24L16-W BR24L32-W BR24L64 ...

Page 5

Typ. ones SPEC 2 Ta=85℃ Ta=-40℃ Ta=25℃ Vcc[V] Fig.3 H input voltage VIH1,2 1 0.8 0.6 Ta=25℃ Ta=85℃ 0.4 SPEC 0.2 Ta=-40℃ ...

Page 6

Typ. ones). 50 SPEC1,2 0 Ta=-40℃ Ta=25℃ -50 Ta=85℃ -100 -150 -200 Vcc[V] Fig.21 Input data hold time tHD:DAT(HIGH) 300 SPEC2 200 SPEC1 100 Ta=85℃ 0 Ta=-40℃ -100 ...

Page 7

... Maximum number of Slave address connected buses 7/32 1 DATA ACK STOP condition ' ' ' HIGH down to LOW A0 1 BR24L01A-W BR24L02 BR24L04-W BR24L08 BR24L16-W BR24L32-W BR24L64-W GND 4 ' when SCL HIGH ' ' LOW . ' ' 1010 . 8 Vcc SCL 5 SDA ...

Page 8

... P9/32.) ・As for page write cycle of BR24L01A-W and BR24L02-W, after the significant 5 bits (4 significant bits in BR24L01-W) of word address are designated arbitrarily, and as for page write command of BR24L04-W, BR24L08-W, and BR24L16-W, after page select bit (PS) of slave ...

Page 9

... BR24L16-W The above numbers are maximum bytes for respective types. Any bytes below these can be written. In the case BR24L02-W, 1 page=8bytes, but the page write cycle write time is 5ms at maximum for 8byte bulk write. It does not stand 5ms at maximum × 8byte=40ms(Max.). ○Write protect (WP) terminal ・ ...

Page 10

Command ○Read cycle Data of EEPROM is read. In read cycle, there are random read cycle and current read cycle. Random read cycle is a command to read data by designating address, and is used generally. Current read cycle ...

Page 11

Software reset is executed when to avoid malfunction after power on, and to reset during command input. Software reset has several kinds, and 3 kinds of them are shown in the figure below. (Refer to Fig.48(a), Fig.48(b), and ...

Page 12

WP is usually fixed to 'H' or 'L', but when WP is used to cancel write cycle and so forth, pay attention to the following WP valid timing. During write cycle execution, in cancel valid ...

Page 13

SDA terminal SDA is NMOS open drain, so requires pull up resistance. As for this resistance value (R value from microcontroller and larger the consumption current ...

Page 14

BUS recommended that SDA port is of open drain input/output. However, when to use CMOS input / output of tri state to SDA port, insert a series resistance Rs ...

Page 15

C BUS input / output circuit ○Input (A0,A2,SCL) Fig.57 Input pin circuit diagram ○Input / output (SDA) Fig.58 Input / output pin circuit diagram ○Input (A1, WP) Fig.59 Input pin circuit diagram ●Notes on power ON At power ...

Page 16

Set SDA and SCL so as not to become 'Hi-Z'. When the above conditions 1 and 2 cannot be observed, take the following countermeasures the case when the above condition 1 cannot be observed. When SDA becomes ...

Page 17

I C BUS Serial EEPROMs BR24S□□□-W Series BR24S16-W, BR24S32-W, BR24S64-W, BR24S128-W, BR24S256-W ●Description BR24S□□□-W series is a serial EEPROM of I ●Features ・ Completely conforming to the world standard I (SDA) ・ Other devices than EEPROM can be connected ...

Page 18

... SDA START BIT Fig.1-(b) Start - stop bit timing SCL SDA D0 ACK t WRITE DATA(n) WR STOP START CONDITION CONDITION Fig.1-(c) Write cycle timing ●Memory cell characteristics (Ta=25℃ Limits Unit - 0.3 ~ +6 450(SOP8) 450(SOP-J8) *2 Number of data rewrite 300(SSOP-B8) *3 330(TSSOP-B8 Data hold years ...

Page 19

11bit 12bit 13bit 14bit 15bit Adddress * decoder * Control circuit High voltage GND 4 generating circuit * 1 11bit: BR24S16-W 12bit: BR24S32-W 13bit: BR24S64-W 14bit: BR24S128-W 15bit: BR24S256-W ●Pin ...

Page 20

Typ. ones.) ●Characteristic data 2.5 SPEC 2 1.5 Ta=-40℃ Ta=25℃ 1 Ta=85℃ 0 SUPPLY VOLTAGE : Vcc[V] Fig.9 Current consumption at WRITE operation I (f =400kHz BR24S16/32/64-W) SCL ...

Page 21

Typ. ones.) ●Characteristic data 5 Ta=-40℃ 4 Ta=25℃ Ta=85℃ SPEC SUPPLY VOLTAGE : Vcc[V] Fig.24 BUS open time before transmission t BUF 0.6 Ta=-40℃ 0.5 Ta=25℃ ...

Page 22

C BUS communication 2 ○I C BUS data communication BUS data communication starts by start condition input, and ends by stop condition input. Data is always 8bit long, and acknowledge is always required after each ...

Page 23

... Fig.36 Page write cycle (BR24S32/64/128/256-W) ・Data is written to the address designated by word address (n-th address). ・By issuing stop bit after 8bit data input, write to memory cell inside starts. ・When internal write is started, command is not accepted for tWR (5ms at maximum). ・By page write cycle, the following can be written in bulk bytes (BR24S16-W) And when data of the maximum bytes or higher is sent, data from the first byte is overwritten. (Refer to " ...

Page 24

SLAVE WORD R T ADDRESS ADDRESS(n) SDA LINE Fig. ...

Page 25

Command ○Read cycle Data of EEPROM is read. In read cycle, there are random read cycle and current read cycle. Random read cycle is a command to read data by designating address, and is used generally. Current read cycle ...

Page 26

Software reset is executed when to avoid malfunction after power on, and to reset during command input. Software reset has several kinds, and 3 kids of them are shown in the figure below. (Refer to Fig.45(a), Fig.45(b), Fig.45(c).) ...

Page 27

WP is usually fixed to 'H' or 'L', but when WP is used to cancel write cycle and so forth, pay attention to the following WP valid timing. During write cycle execution, in cancel valid ...

Page 28

Pull up resistance of SDA terminal SDA is NMOS open drain, so requires pull up resistance. As for this resistance value (R from microcontroller and consumption ...

Page 29

Cautions on microcontroller connection ○ BUS recommended that SDA port is of open drain input/output. However, when to use CMOS input / output of tri state to SDA port, insert a series ...

Page 30

I C BUS input / output circuit ○ Input (A0, A1, A2, SCL, WP) Fig.54 Input pin circuit diagram ○ Input/Output (SDA) Fig.55 Input /output pin circuit diagram 30/32 ...

Page 31

Notes on power ON At power on internal circuit and set, Vcc rises through unstable low voltage area, and IC inside is not completely reset, and malfunction may occur. To prevent this, functions of POR circuit and ...

Page 32

Selection of order type BUS type Operating ROHM type 2 24 : I temperature C name L:-40℃~+85℃ S:-40℃~+85℃ ● Package specifications SOP8/SOP-J8/SSOP-B/TSSOP-B8/TSSOP-B8J 〈External appearance〉 SOP8 SOP-J8 5.0±0.2 4.9±0 ...

Page 33

Appendix No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product ...

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