XRT83VSH314ES Exar, XRT83VSH314ES Datasheet - Page 71

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XRT83VSH314ES

Manufacturer Part Number
XRT83VSH314ES
Description
Peripheral Drivers & Components - PCIs 14 CHT1/E1LIUSH LOW COST VERSION
Manufacturer
Exar
Datasheet

Specifications of XRT83VSH314ES

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
REV. 1.0.1
D7 - D5
B
B
D4
D3
D2
D1
D0
D7
D6
D5
D4
IT
IT
TCLKCNL
CLKSEL3
CLKSEL2
CLKSEL1
CLKSEL0
Reserved
GCHIS7
GCHIS6
GCHIS5
GCHIS4
N
N
AME
AME
T
T
ABLE
ABLE
These Register Bits are Not Used
Transmit Clock Control
When this bit is pulled "High" and there is no TCLK signal present
on the transmit input path, TTIP/TRING will Transmit All "Ones"
(TAOS). By default, TTIP/TRING will Transmit All Zeros.
0 = All Zeros
1 = All Ones
Clock Input Select
CLKSEL[3:0] is used to select the input clock source used as the
internal timing reference.
0000 = 2.048 MHz
0001 = 1.544 MHz
1000 = 4.096 Mhz
1001 = 3.088 Mhz
1010 = 8.192 Mhz
1011 = 6.176 Mhz
1100 = 16.384 Mhz
1101 = 12.352 Mhz
1110 = 2.048 Mhz
1111 = 1.544 Mhz
Global Channel Interrupt Status for Channel 7
0 = No interrupt activity from channel 7
1 = Interrupt was generated from channel 7
Global Channel Interrupt Status for Channel 6
0 = No interrupt activity from channel 6
1 = Interrupt was generated from channel 6
Global Channel Interrupt Status for Channel 5
0 = No interrupt activity from channel 5
1 = Interrupt was generated from channel 5
Global Channel Interrupt Status for Channel 4
0 = No interrupt activity from channel 4
1 = Interrupt was generated from channel 4
50: M
49: M
ICROPROCESSOR
ICROPROCESSOR
G
G
LOBAL
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
LOBAL
R
R
F
F
UNCTION
EGISTER
UNCTION
EGISTER
R
R
68
EGISTER
EGISTER
(0
(0
X
X
EA
E9
0
0
X
X
EA
H
E9
H
)
)
H
H
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
Register
Register
XRT83VSH314
Type
Type
RUR
RUR
RUR
RUR
R/W
R/W
R/W
(HW reset)
(HW reset)
Default
Default
Value
Value
0
0
0
0
0
0
0
0
0
0

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