XRT83VSH314ES Exar, XRT83VSH314ES Datasheet - Page 62

• Manufacturer Part Number: XRT83VSH314ES
• Description: Peripheral Drivers & Components - PCIs 14 CHT1/E1LIUSH LOW COST VERSION
• Manufacturer: Exar

Specifications of XRT83VSH314ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83VSH314
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
N
OTE
D[7:0]
B
B
B
D1
D0
: Any change in status will generate an interrupt (if enabled in channel register 0x04h and GIE is set to "1" in the
D7
D6
D5
D4
D3
D2
D1
D0
IT
IT
IT
global register 0xE0h). The status registers are reset upon read (RUR).
Reserved
Reserved
QRPDIS
RLOSIS
1SEG6
1SEG5
1SEG4
1SEG3
1SEG2
1SEG1
1SEG0
N
N
N
AME
AME
AME
T
T
T
ABLE
ABLE
ABLE
Receiver Loss of Signal Interrupt Status
0 = No change
1 = Change in status occurred
Quasi Random Pattern Detection Interrupt Status
0 = No change
1 = Change in status occurred
These Bits are Reserved
This Register Bit is Not Used
Arbitrary Pulse Generation
The transmit output pulse is divided into 8 individual segments.
This register is used to program the first segment which corre-
sponds to the overshoot of the pulse amplitude. There are four
segments for the top portion of the pulse and four segments for the
bottom portion of the pulse. Segment number 5 corresponds to
the undershoot of the pulse. The MSB of each segment is the sign
bit.
Bit 6 = 0 = Negative Direction
Bit 6 = 1 = Positive Direction
30: M
31: M
32: M
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
C
C
C
HANNEL
HANNEL
HANNEL
0-13 (0
0-13 (0
0-13 (0
F
F
F
UNCTION
UNCTION
UNCTION
R
R
R
59
EGISTER
EGISTER
EGISTER
X
X
X
06
07
08
H
H
H
-0
-0
-0
0
X
0
X
0
X
D6
D7
D8
X
X
X
06
07
08
H
H
H
H
)
H
)
H
)
B
B
B
IT
IT
IT
D
D
D
ESCRIPTION
ESCRIPTION
ESCRIPTION
Register
Register
Register
Type
RUR
RUR
Type
Type
R/W
RO
X
(HW reset)
(HW reset)
(HW reset)
REV. 1.0.1
Default
Default
Default
Value
Value
Value
0
0
0
0
0
0
0
0
0
0
0