DS26524GA4 Maxim Integrated, DS26524GA4 Datasheet - Page 261

• Manufacturer Part Number: DS26524GA4
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26524GA4

• Part # Aliases: 90-26524-GA4

13.
The DS26524 IEEE 1149.1 design supports the standard instruction codes SAMPLE:PRELOAD, BYPASS, and
EXTEST. Optional public instructions included are HIGHZ, CLAMP, and IDCODE. See
contains the following as required by IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture.
The Test Access Port has the necessary interface pins: JTRST , JTCLK, JTMS, JTDI, and JTDO. See the pin
descriptions for details.
Figure 13-1. JTAG Functional Block Diagram
JTAG BOUNDARY SCAN AND TEST ACCESS PORT
Test Access Port (TAP)
TAP Controller
Instruction Register
Bypass Register
Boundary Scan Register
Device Identification Register
10kΩ
V
DD
JTDI
10kΩ
V
DD
JTMS
TEST ACCESS PORT
BOUNDRY SCAN
IDENTIFICATION
CONTROLLER
INSTRUCTION
REGISTER
REGISTER
REGISTER
REGISTER
BYPASS
JTCLK
261 of 273
10kΩ
V
DD
JTRST
SELECT
OUTPUT ENABLE
MUX
Table
JTDO
13-1. The DS26524