DS26524GA4 Maxim Integrated, DS26524GA4 Datasheet - Page 194

• Manufacturer Part Number: DS26524GA4
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26524GA4

• Part # Aliases: 90-26524-GA4

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: See
Bit 7: Transmit Japanese CRC-6 Enable (TJC).
Bit 6: Transmit F-Bit Pass Through (TFPT).
Bit 5: Transmit CRC Pass Through (TCPT).
Bit 4: Transmit Software-Signaling Enable (TSSE). This function is enabled by TB7ZS (TCR2.0).
Bit 3: Global Bit 7 Stuffing (GB7S). This function is enabled by TB7ZS (TCR2.0).
Bit 2: Transmit B8ZS Enable (TB8ZS).
Bit 1: Transmit Alarm Indication Signal (TAIS).
Bit 0: Transmit Remote Alarm Indication (TRAI).
0 = use ANSI/AT&T:ITU-T CRC-6 calculation (normal operation)
1 = use Japanese standard JT-G704 CRC-6 calculation
0 = F-bits sourced internally
1 = F-bits sampled at TSER
0 = source CRC-6 bits internally
1 = CRC-6 bits sampled at TSER during F-bit time
0 = do not source signaling data from the TSx registers regardless of the SSIEx registers. The SSIEx
registers still define which channels are to have B7 stuffing performed.
1 = source signaling data as enabled by the SSIEx registers.
0 = allow the SSIEx registers to determine which channels containing all zeros are to be bit 7 stuffed
1 = force bit 7 stuffing in all zero-byte channels of that port, regardless of how the SSIEx registers are
programmed
0 = B8ZS disabled
1 = B8ZS enabled
0 = transmit data normally
1 = transmit an unframed all-ones code at TPOS and TNEG
0 = do not transmit remote alarm
1 = transmit remote alarm
TCR1
for E1 mode.
TJC
7
0
TCR1 (T1 Mode)
Transmit Control Register 1
181h + (200h x n): where n = 0 to 3, for Ports 1 to 4
TFPT
6
0
TCPT
5
0
194 of 273
TSSE
0
4
GB7S
3
0
TB8ZS
2
0
TAIS
1
0
TRAI
0
0