AT89LP51ED2-20AU Atmel, AT89LP51ED2-20AU Datasheet - Page 190

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AT89LP51ED2-20AU

Manufacturer Part Number
AT89LP51ED2-20AU
Description
8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
Manufacturer
Atmel
Datasheet

Specifications of AT89LP51ED2-20AU

Rohs
yes
Core
8051
Processor Series
AT89x
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
64 KB
Data Ram Size
256 B
On-chip Adc
Yes
Operating Supply Voltage
2.4 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TQFP-44
Mounting Style
SMD/SMT
Data Rom Size
4 KB
Interface Type
2-Wire, SPI, UART
Number Of Programmable I/os
36
Number Of Timers
3
Program Memory Type
Flash
Factory Pack Quantity
160

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT89LP51ED2-20AU
Manufacturer:
Atmel
Quantity:
10 000
24.1.2
24.2
Table 24-5.
190
Address
00 – 01H
02 – 03H
04H
05H
06H
07H
User Configuration Fuses
AT89LP51RD2/ED2/ID2 Preliminary
Atmel Signature Array
Fuse Name
Clock Source A – CSA[0:1]
Start-up Time – SUT[0:1]
Bootloader Jump Bit
External RAM Enable
Compatibility Mode
ISP Enable
User Configuration Fuse Definitions
(3)
The Atmel Signature Array is a 128-byte read-only array that contains the Device ID and related
information. The Device ID values are shown in
byte is also stored at address 0008H.
Table 24-4.
The AT89LP51RD2/ED2/ID2 includes 19 user fuses for configuration of the device. Each fuse is
accessed at a separate address in the User Fuse Row, with each byte representing one fuse as
listed in
code bytes except they are not affected by Chip Erase. Fuses can be cleared at any time by writ-
ing 00H to the appropriate locations in the fuse row. However, to set a fuse, i.e. write it to FFH
the entire fuse row must be erased and then reprogrammed. The programmer should read the
state of all the fuses into a temporary location, modify those fuses which need to be disabled,
then issue a Fuse Write with Auto-Erase command using the temporary data.
Note that the bootloader only has limited access to the fuses. For full device configuration an
external ISP programmer is required.
Device
AT89LP51RD2
AT89LP51ED2
AT89LP51ID2
Table
(2)
Device ID Values in Atmel Signature
24-5. From a programming standpoint, fuses are treated the same as normal
Description
Selects source for the system clock when using OSCA:
CSA1
FFh
FFh
00h
00h
Selects time-out delay for the POR/BOD/PWD wake-up period:
SUT1
00h
00h
FFh
FFh
FFh: Reset to user application at 0000H
00h: Reset to ROM bootloader at F800H
FFh: External RAM enabled at reset (EXTRAM = 1)
00h: External RAM disabled at reset (EXTRAM = 0)
FFh: CPU functions in 12-clock Compatibility mode
00h: CPU functions is single-cycle Fast mode
FFh: In-System Programming Enabled
00h: In-System Programming Disabled (Enabled at POR only)
1EH
1EH
1EH
00H
CSA0
FFh
00h
SUT0
00h
FFh
FFh
00h
00h
FFh
01H
64H
64H
64H
Selected Source
High Speed Crystal Oscillator on XTAL1A/XTAL2A (XTAL)
Low Power Crystal Oscillator on XTAL1A/XTAL2A (XTAL)
External Clock on XTAL1A (XCLK)
Internal 8 MHz RC Oscillator (IRC)
Selected Time-out
1 ms (XTAL); 16 µs (XCLK/IRC)
2 ms (XTAL); 512 µs (XCLK/IRC)
4 ms (XTAL); 1 ms (XCLK/IRC)
16 ms (XTAL); 4 ms (XCLK/IRC)
02H
72H
65H
69H
Table
24-4. A copy of the OSCCAL calibration
30H
58H
58H
58H
D7H
D7H
D7H
31H
ECH
ECH
ECH
60H
3714A–MICRO–7/11
EFH
EFH
EFH
61H

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