AT89LP51ED2-20AU Atmel, AT89LP51ED2-20AU Datasheet - Page 186
AT89LP51ED2-20AU
Manufacturer Part Number
AT89LP51ED2-20AU
Description
8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
Manufacturer
Atmel
Datasheet
1.AT89LP51ED2-20AAU.pdf
(254 pages)
Specifications of AT89LP51ED2-20AU
Rohs
yes
Core
8051
Processor Series
AT89x
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
64 KB
Data Ram Size
256 B
On-chip Adc
Yes
Operating Supply Voltage
2.4 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TQFP-44
Mounting Style
SMD/SMT
Data Rom Size
4 KB
Interface Type
2-Wire, SPI, UART
Number Of Programmable I/os
36
Number Of Timers
3
Program Memory Type
Flash
Factory Pack Quantity
160
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23.2
23.3
186
Software Breakpoints
Limitations of On-Chip Debug
AT89LP51RD2/ED2/ID2 Preliminary
The AT89LP51RD2/ED2/ID2 microcontroller includes a BREAK instruction for implementing
program memory breakpoints in software. A software breakpoint can be inserted manually by
placing the BREAK instruction in the program code. Some emulator systems may allow for auto-
matic insertion/deletion of software breakpoints. The Flash memory must be re-programmed
each time a software breakpoint is changed. Frequent insertions/deletions of software break-
points will reduce the endurance of the nonvolatile memory. Devices used for debugging
purposes should not be shipped to end customers. The BREAK instruction is treated as a two-
cycle NOP when OCD is disabled.
The AT89LP51RD2/ED2/ID2 is a fully-featured microcontroller that multiplexes several functions
on its limited I/O pins. Some device functionality must be sacrificed to provide resources for On-
Chip Debugging. The On-Chip Debug System has the following limitations:
• The Debug Clock pin (DCL) is physically located on the same pin as the External Reset
• The Debug Data pin DDA is physically located on the same pin as P4.3. The P4.3 I/O
• The bootloader has priority over OCD. Debugging is not possible when the bootloader is
• Programming of any hardware lockbit will disable OCD
• The OCD pins are not bonded in the 40-pin PDIP package. In order to debug the device, one
(RST). Therefore, an external reset source is unavailable and must be emulated when OCD
is enabled. The Reset Output feature is also disabled except during POR
function cannot be emulated in this mode
active (BLJB = 0 or hardware entry triggered)
of the 44-pin packages must be used
3714A–MICRO–7/11
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