AT89LP51ED2-20AU Atmel, AT89LP51ED2-20AU Datasheet - Page 166

• Manufacturer Part Number: AT89LP51ED2-20AU
• Description: 8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
• Manufacturer: Atmel

Specifications of AT89LP51ED2-20AU

• Rohs: yes
• Core: 8051
• Processor Series: AT89x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Data Rom Size: 4 KB
• Interface Type: 2-Wire, SPI, UART
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Program Memory Type: Flash
• Factory Pack Quantity: 160

21. Digital-to-Analog/Analog-to-Digital Converter
166
AT89LP51RD2/ED2/ID2 Preliminary
The AT89LP51RD2/ED2/ID2 includes a 10-bit Data Converter (DADC) with the following
features:
The AT89LP51RD2/ED2/ID2 features a 10-bit successive approximation data converter that
functions in either Analog-to-Digital (ADC) or Digital-to-Analog (DAC) mode. A block diagram of
the converter is shown in
ended or four differential voltage inputs from the pins of Port 0 to a sample-and-hold circuit that
in turn provides an input to the successive approximation block. The Sample-and-Hold circuit
ensures that the input voltage to the ADC is held at a constant level during conversion. The SAR
block digitizes the analog voltage into a 10-bit value accessible through a data register. The
SAR block also operates in reverse to generate an analog voltage on Port 2 from a 10-bit digital
value.
ADC results are available in the DADL and DADH register pair. The ADC result scale is deter-
mined by the reference voltage (V
externally from V
with single-ended voltage channels referring to the level above or below V
results may be right or left adjusted within the 16-bit register. The sign is extended through the 6
MSBs of right-adjusted results and the 6 LSBs of left-adjusted results are zeroed. If only 8-bit
precision is required, the user should select left-adjusted by setting LADJ in DADC and read only
the DADH register. Example results are listed in
The conversion formulas are as follows:
Conversion results can be converted into unsigned binary by adding 02h to DADH in right-
adjusted mode or 80h to DADH in left-adjusted mode. When using the external reference
(V
• Digital-to-Analog (DAC) or Analog-to-Digital (ADC) Mode
• 10-bit Resolution
• 6.5 µs Conversion Time
• 7 Multiplexed Single-ended Channels or 3 Differential Channels
• Internal Temperature Sensor or Supply Voltage Channels
• Selectable 1.0V±10% Internal Reference Voltage
• Optional Left-Adjust of Conversion Results
• Single Conversion or Timer-triggered Mode
• Interrupt on Conversion Complete
DD
/2) in single-ended mode this is equivalent to:
(Unsigned Singled-Ended)
DD
/2. The ADC results are always represented in signed 2’s complement form,
(Singled-Ended)
(Differential)
Figure
21-1. An 8-channel Analog Multiplexer connects eight single-
REF
) generated either internally from a 1.0V reference or
ADC
ADC
ADC
Table
=
=
=
511
511
1023
21-1.
×
×
V
---------------------------------------- -
×
V
--------------------------- -
IN
IN+
---------- -
V
V
V
–
DD
IN
REF
V
–
(
V
REF
V
DD
IN-
⁄
2
)
DD
3714A–MICRO–7/11
/2. The 10-bit