ACS422A68TAGZBX8 IDT, ACS422A68TAGZBX8 Datasheet - Page 93

• Manufacturer Part Number: ACS422A68TAGZBX8
• Description: Interface - CODECs
• Manufacturer: IDT

Specifications of ACS422A68TAGZBX8

• Rohs: yes
• Part # Aliases: IDTACS422A68TAGZBX8

6024 Silver Creek Valley Road
San Jose, California 95138
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scribed herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and perfor-
mance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined
in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained
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ACS422x68
LOW-POWER, HIGH-FIDELITY, INTEGRATED CODEC
15. DOCUMENT REVISION HISTORY
Revision
0.51
0.52
0.53
0.54
0.5
1.0
1.1
1.2
1.3
1.4
1.5
1.6
September 2012
November 2012
November 2011
February 2013
January 2012
October 2012
June 2011
April 2011
May 2011
May 2011
July 2011
July 2011
Date
Description of Change
initial release
Updated application information for class D amplifier.
Corrected mismatch between pinout and package number assignments. Front page description and
target applications updated.
Updated registers for ZB silicon. R136 default to 08h, R34 default to 08h, R27 bits 1:2 now reserved.
R16, R8, R9 bit 7 now reserved. R31 bit 0 now sd_force_on
Updated HLA/HAG pinout and pin tables. Added low power mode typical power consumption table
and updated standard typical values.
Removed Preliminary and Confidential status from datasheet. Updated TAG/TLA package diagram.
Removed applications section, see reference design and application notes on www.idt.com, updates
to the electrical characteristics. Compressor/limiter configuration section separated. Updated audio
output references to include 2W at 4ohms. Added DDX(TM) name and logo. Removed NAG/HLA
package option and pinout .
Added HLA package option. Changed Power Supply Rejection Ration maximum from 5.5 V to 5.25
V.
Corrected the I/O type for the Analog output pins. Corrected the pin location in Analog output pin
table for the BTL outputs.
Clarifications to MCLK rate. Updated PLL Electrical characteristics.
Corrected HP_L and HP_R pin location in pin table to match the pin diagram.
Removed typical and low power consumption tables from electricals section, since these metrics are
driven by software settings and are system specific, the typicals listed were not representative of
what can be expected of the device.
Corrected the package drawing to dual row HLA.