ACS422A68TAGZBX8 IDT, ACS422A68TAGZBX8 Datasheet - Page 52
ACS422A68TAGZBX8
Manufacturer Part Number
ACS422A68TAGZBX8
Description
Interface - CODECs
Manufacturer
IDT
Datasheet
1.ACS422A68TAGZBX8.pdf
(93 pages)
Specifications of ACS422A68TAGZBX8
Rohs
yes
Part # Aliases
IDTACS422A68TAGZBX8
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ACS422x68
LOW-POWER, HIGH-FIDELITY, INTEGRATED CODEC
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
4.5.
To provide the correct sampling frequency on the digital audio outputs, ADC filters perform true 24-bit signal processing
and convert the raw multi-bit oversampled data from the ADC using the digital filter path illustrated below.
R8 (08h)
Left Input Volume
(INVOLL)
R9 (09h)
Right Input Volume
(INVOLR)
R28 (1Ch)
Additional Control
(CTL)
Register Address
4.4.1.
ADC Digital Filter
Input PGA Software Control Register.
Bit
5:0
5:0
7
6
7
6
0
INVOL_R
INVOL_L
RSVD
RSVD
TOEN
Label
IZCR
IZCL
[5:0]
[5:0]
Table 60. INVOL L&R Registers
Figure 19. ADC Filter Data path
Type
RW
RW
RW
RW
RW
RW
RW
Default
010111
010111
52
(0dB)
(0dB)
0
0
0
0
0
Left Channel Zero Cross Detector
1 = Change gain on zero cross only
0 = Change gain immediately
Note: If INVOLU is set, this setting will take effect
after the next write to the Right Input Volume register.
Left Channel Input Volume Control
111111 = +30dB
111110 = +29.25dB
.. 0.75dB steps down to 000000 = -17.25dB
Note: If INVOLU is set, this setting will take effect
after the next write to the Right Input Volume register.
Right Channel Zero Cross Detector
1 = Change gain on zero cross only
0 = Change gain immediately
Right Channel Input Volume Control
111111 = +30dB
111110 = +29.25dB
.. 0.75dB steps down to 000000 = -17.25dB
Zero Cross Time-out Enable
0: Time-out Disabled
1: Time-out Enabled - volumes updated if no zero
cross event has occurred before time-out
Description
ACS422X68
V1.6 01/13
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