MAX98090AETL+ Maxim Integrated, MAX98090AETL+ Datasheet - Page 68

• Manufacturer Part Number: MAX98090AETL+
• Description: Interface - CODECs 5V 130mW Stereo Headphone Amp
• Manufacturer: Maxim Integrated

Specifications of MAX98090AETL+

• Rohs: yes

MAX98090
Detailed Description
The MAX98090 is a fully integrated stereo audio codec
with FlexSound audio processing and integrated input
and output audio amplifiers.
The device features either six (WLP package) or four
(TQFN package) flexible analog inputs. Each pair can
be configured as a differential analog microphone input,
a stereo single ended or differential line input(s), or as a
reduced power, direct differential analog input to the ADC
mixer. One input pair, IN1/IN2, can also be retasked to
support two digital microphones. As a result, two micro-
phones (either analog or digital) can be recorded from
simultaneously. The input analog signals can be amplified
by up to 50dB, and then are either recorded by the stereo
ADC or routed directly to the analog output mixers for
playback.
The ADC supports sample rates between 8kHz and
96kHz, features two performance modes, and provides
two oversampling rate options. The ADC to DAI digital
record path features both voice (IIR) and Music (FIR)
filtering, an optional DC-blocking highpass filter, a fully
configurable biquad filter, and a -12dB to +45dB range of
programmable digital gain and level control.
The digital audio interface (DAI) can simultaneously
transmit and receive separate and distinct stereo audio
signals. The DAI supports a wide range of PCM digital
audio formats including I
fied (RJ), and four slot TDM.
As with the record path, the DAI to DAC playback path
supports sample rates from 8kHz to 96kHz, both voice
(IIR) and music (FIR) filtering (high stop band attenuation
at f
range of programmable digital gain and level control. In
addition, the playback path also features a 7-band para-
metric biquad equalizer, dynamic range control (DRC),
and a summing digital sidetone from the record path DSP.
The device includes three analog output drivers. The
first is a Class AB differential receiver/earpiece amplifier.
Alternatively, the receiver amplifier can also be configured
as a stereo single-ended line output driver.
www.maximintegrated.com
S
/2), optional DC blocking filters, and a -15dB to +18dB
2
S, left justified (LJ), right justi-
The second is an integrated, filterless, Class D stereo
speaker amplifier. This amplifier provides efficient ampli-
fication for two speakers, and includes active emissions
limiting to minimize the radiated emissions (EMI) tradition-
ally associated with Class D. The right channel features a
slave mode, in which the switching is synchronized to that
of the left channel to eliminate the beat tone that can occur
with asynchronous operation. In most systems with short
speaker traces, no Class D output filtering is required.
The third is a Class H, ground referenced stereo headphone
amplifier featuring Maxim’s second generation DirectDrive
architecture. The Class H headphone amplifier features
an internal charge pump that generates both a positive
and negative supply for the headphone amplifier. This
provides a ground referenced output signal that eliminates
the need for either DC-blocking capacitors or a midrail bias
for the headphone jack ground return. The headphone
dedicated ground sense current return reduces crosstalk
and output noise. A tracking circuit monitors the signal
level and automatically selects the appropriate switching
frequency and supply voltage level. For low signal levels,
the charge pump switches at a reduced frequency and out-
puts ±V
amplitude increase, the charge-pump switching frequency
also increases, and continues to output ±V
high signal levels, the charge pump outputs full-scale rails
at ±V
The device also includes several additional features such
as a programmable external microphone bias, configurable
jack detection and identification, extensive click-and-pop
reduction circuitry, power and performance management
settings, and a full range of quick configuration options.
Device I
Table 1 lists all of the registers, their addresses, and
power-on-reset (PoR) states. Registers 0x01, 0x02, and
0xFF are read only. Register 0x00 and all of the remain-
ing registers are read/write. Write zeros to all unused bits
in the register table when updating the register, unless
otherwise noted.
Ultra-Low Power Stereo Audio Codec
HPVDD
HPVDD
2
C Register Map
to maximize output power.
/2 for improved efficiency. When the signal
Maxim Integrated │ 68
HPVDD
/2. For