MAX98090AETL+ Maxim Integrated, MAX98090AETL+ Datasheet - Page 156

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MAX98090AETL+

Manufacturer Part Number
MAX98090AETL+
Description
Interface - CODECs 5V 130mW Stereo Headphone Amp
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX98090AETL+

Rohs
yes
MAX98090
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX98090 uses to handshake receipt each byte of data
when in write mode. The MAX98090 pulls down SDA
during the entire master-generated 9th clock pulse if the
previous byte is successfully received. Monitoring ACK
allows for detection of unsuccessful data transfers. An
unsuccessful data transfer occurs if a receiving device
is busy or if a system fault has occurred. In the event
of an unsuccessful data transfer, the bus master retries
communication. The master pulls down SDA during the
9th clock cycle to acknowledge receipt of data when the
MAX98090 is in read mode. An acknowledge is sent by
Figure 48. Acknowledge Timing
Figure 49. Writing One Byte of Data to the MAX98090
Figure 50. Writing n-Bytes of Data to the MAX98090
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S
ACKNOWLEDGE FROM MAX98090
S
SLAVE ADDRESS
ACKNOWLEDGE FROM MAX98090
SLAVE ADDRESS
R/W
O
SDA
SCL
R/W
CONDITION
A
ACKNOWLEDGE FROM MAX98090
START
O
REGISTER ADDRESS
A
1
ACKNOWLEDGE FROM MAX98090
REGISTER ADDRESS
2
ACKNOWLEDGE FROM MAX98090
A
B7 B6 B5 B4 B3 B2 B1 B0
AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER
NOT ACKNOWLEDGE
the master after each read byte to allow data transfer to
continue. A not acknowledge is sent when the master
reads the final byte of data from the MAX98090, followed
by a STOP condition.
Write Data Format
A write to the MAX98090 includes transmission of a
START condition, the slave address with the R /W bit set
to 0, one byte of data to configure the internal register
address pointer, one or more bytes of data, and a STOP
condition. Figure 49 illustrates the proper frame format
for writing one byte of data to the MAX98090. Figure 50
illustrates the frame format for writing n-bytes of data to
the MAX98090.
DATA BYTE 1
ACKNOWLEDGE
Ultra-Low Power Stereo Audio Codec
1 BYTE
8
ACKNOWLEDGMENT
CLOCK PULSE FOR
A
9
B7
AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER
A
B6
ACKNOWLEDGE FROM MAX98090
ACKNOWLEDGE FROM MAX98090
B5
B7 B6 B5 B4 B3 B2 B1 B0
DATA BYTE
B4
1 BYTE
B3
DATA BYTE n
1 BYTE
B2
Maxim Integrated │ 156
B1
B0
A
A
P
P

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