MAX98090AETL+ Maxim Integrated, MAX98090AETL+ Datasheet - Page 157

• Manufacturer Part Number: MAX98090AETL+
• Description: Interface - CODECs 5V 130mW Stereo Headphone Amp
• Manufacturer: Maxim Integrated

Specifications of MAX98090AETL+

• Rohs: yes

MAX98090
The slave address with the R/W bit set to 0 indicates that
the master intends to write data to the MAX98090. The
MAX98090 acknowledges receipt of the address byte
during the master-generated 9th SCL pulse.
The second byte transmitted from the master configures
the MAX98090’s internal register address pointer. The
pointer tells the MAX98090 where to write the next byte
of data. An acknowledge pulse is sent by the MAX98090
upon receipt of the address pointer data.
The third byte sent to the MAX98090 contains the data
that is written to the chosen register. An acknowledge
pulse from the MAX98090 signals receipt of the data
byte. The address pointer autoincrements to the next
register address after each received data byte. This auto-
increment feature allows a master to write to sequential
registers within one continuous frame. The master signals
the end of transmission by issuing a STOP condition.
Register addresses greater than 0xE7 are reserved. Do
not write to these addresses.
Read Data Format
Send the slave address with the R/W bit set to 1 to initiate
a read operation. The MAX98090 acknowledges receipt
of its slave address by pulling SDA low during the 9th SCL
clock pulse. A START command followed by a read com-
mand resets the address pointer to register 0x00.
Figure 51. Reading One Byte of Data from the MAX98090
Figure 52. Reading n-Bytes of Data from the MAX98090
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S
ACKNOWLEDGE FROM MAX98090
S
ACKNOWLEDGE FROM MAX98090
SLAVE ADDRESS
SLAVE ADDRESS
R/W
R/W
O
O
A
ACKNOWLEDGE FROM MAX98090
A
ACKNOWLEDGE FROM MAX98090
REGISTER ADDRESS
REGISTER ADDRESS
REPEATED START
REPEATED START
A
A Sr
Sr
ACKNOWLEDGE FROM MAX98090
ACKNOWLEDGE FROM MAX98090
The first byte transmitted from the MAX98090 is the con-
tents of register 0x00. Transmitted data is valid on the
rising edge of SCL. The address pointer autoincrements
after each read data byte. This autoincrement feature
allows all registers to be read sequentially within one con-
tinuous frame. A STOP condition can be issued after any
number of read data bytes. If a STOP condition is issued
followed by another read operation, the first data byte to
be read will be from register 0x00.
The address pointer can be preset to a specific register
before a read command is issued. The master presets the
address pointer by first sending the MAX98090’s slave
address with the R/W bit set to 0 followed by the register
address. A REPEATED START condition is then sent fol-
lowed by the slave address with the R/W bit set to 1. The
MAX98090 then transmits the contents of the specified
register, and the address pointer autoincrements after
transmitting the first byte.
The master acknowledges receipt of each read byte
during the acknowledge clock pulse. The master must
acknowledge all correctly received bytes except the last
byte. The final byte must be followed by a not acknowl-
edge from the master and then a STOP condition.
Figure 51 illustrates the frame format for reading one byte
from the MAX98090. Figure 52 illustrates the frame for-
mat for reading multiple bytes from the MAX98090.
SLAVE ADDRESS
SLAVE ADDRESS
Ultra-Low Power Stereo Audio Codec
R/W
AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER
R/W
AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER
1
1
A
A
NOT ACKNOWLEDGE FROM MASTER
DATA BYTE
1 BYTE
DATA BYTE
1 BYTE
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A
P
A