MAX98090AETL+ Maxim Integrated, MAX98090AETL+ Datasheet
MAX98090AETL+
Specifications of MAX98090AETL+
Related parts for MAX98090AETL+
MAX98090AETL+ Summary of contents
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MAX98090 General Description The MAX98090 is a fully integrated audio codec whose high-performance, ultra-low power consumption and small footprint make it ideal for portable applications. The device features a highly flexible input scheme with six input pins (WLP) that can ...
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... Analog Line Input Mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 Analog Line Input PGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Analog Input PGA to Analog Output Mixer Analog Full-Scale Direct to ADC Mixer Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 Audio Record Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 Analog-to-Digital Converter (ADC ADC Functional Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 www.maximintegrated.com Ultra-Low Power Stereo Audio Codec TABLE OF CONTENTS Maxim Integrated │ 2 ...
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... Headphone Output Mixer and Gain Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 Headphone Ground Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 DirectDrive Headphone Output Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 Class H Amplifier Charge Pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 Click-and-Pop Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 Jack Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143 Jack Detection Internal Comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 Jack Detection Programmable Debounce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 www.maximintegrated.com Ultra-Low Power Stereo Audio Codec Maxim Integrated │ 3 ...
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... EMI Considerations and Optional Ferrite Bead Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 RF Susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 Supply Bypassing, Layout, and Grounding 163 Recommended PCB Routing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 Unused Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 WLP Applications Information 164 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 Chip Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166 www.maximintegrated.com Ultra-Low Power Stereo Audio Codec Maxim Integrated │ 4 ...
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... Figure 35. Class D Speaker Output Functional Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131 Figure 36. DirectDrive Headphone Output Functional Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 Figure 37. Reduced Power DAC Playback to Headphone Output Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 Figure 38. Headphone Output Ground Sense Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 www.maximintegrated.com Ultra-Low Power Stereo Audio Codec LIST OF FIGURES Maxim Integrated │ 5 ...
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... Table 11. Microphone Bias Level Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Table 12. Digital Microphone Clocks for Commonly Used Master Clocks Settings . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Table 13. Digital Microphone Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Table 14. Digital Microphone Configuration Table 15. Recommended Compensation Filter Settings for f www.maximintegrated.com Ultra-Low Power Stereo Audio Codec LIST OF FIGURES (continued) LIST OF TABLES = 11.2896MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 MCLK Maxim Integrated │ 6 ...
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... Table 52. Parametric Equalizer Band N (1–7) Biquad Filter Coefficient Registers . . . . . . . . . . . . . . . . . . . . . . . . . . .119 Table 53. Dynamic Range Control (DRC) Timing Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 www.maximintegrated.com Ultra-Low Power Stereo Audio Codec LIST OF TABLES (continued) = 12MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 MCLK = 12.288MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 MCLK = 13MHz/26MHz . . . . . . . . . . . . . . . . . . . . . . . . . 88 MCLK = 19.2MHz MCLK = 256 x f MCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 S Maxim Integrated │ 7 ...
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... Table 87. Revision ID Number Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154 Table 88. Device Slave Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155 Table 89. Detailed Device Startup Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 Table 90. Register Changes that Require SHDN = 160 Table 91. Unused Pin Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 www.maximintegrated.com Ultra-Low Power Stereo Audio Codec LIST OF TABLES (continued) Maxim Integrated │ 8 ...
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... RIGHT PGA HP MUX -12dB TO 0dB RIGHT MIC 2 MIXER LINE A MIXHPR[5:0] LINE B HPVOLR[4:0] HEADPHONE MIXHPRG[1:0] HPRM DIRECTDRIVE HPREN CHARGE PUMP CPVSS CPVDD C1N C1P Maxim Integrated │ 9 RCVP/ LOUTL RCVN/ LOUTR SPKLGND SPKLP SPKLN SPK_VDD SPKRP SPKRN SPKRGND HPL HPSNS HPR HPVDD HPGND ...
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... RCV ) connected between from RCVP/LOUTL and LOUT SPK = 2.2µ 1µF, C REF BIAS MICBIAS = A = 0dB, A V_ADCLVL V_ADCGAIN = 0dB 12.288MHz 48kHz, MAS = MCLK LRCLK = +25°C.) (Note 2) A MIN TYP MAX , V , SPKVDD 2.8 3.7 5.5 1.65 1.8 1.08 1.2 1.98 1.65 1.8 3.6 1.94 3.5 0.73 0.97 1.2 1.45 0 0.005 1.04 1.3 0.91 2.4 2.18 1.05 1.3 Maxim Integrated │ 0.3V) + 0.3V) + 0.3V) + 0.3V) + 0.3V) + 0.3V) ) connected ) connected = C1N-C1P = V_DACLVL UNITS ...
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... A = 0dB, A V_ADCLVL V_ADCGAIN = 0dB 12.288MHz 48kHz, MAS = MCLK LRCLK = +25°C.) (Note 2) A MIN TYP MAX 1.25 0. RMS -82 -75 , RMS -91 - 2.2 1.1 4.5 0.8 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS µ ...
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... MIN TYP MAX 1 6 2.1 2.2 2.3 2.3 2.4 2.5 2.475 2.57 2.7 2.7 2.8 2.9 ±0.085 ±0.5 ±0.085 ±0.75 ±0. 7.4 52.3 98 -85 -80 0.5 1 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS % V RMS kΩ ± µV RMS nV/√ RMS ...
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... MIN TYP MAX -83 -72 100 -68 - -71 68 -63 -61 -59.5 +7.2 +8 +8.75 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS kΩ 21 kΩ RMS dB ...
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... V_ADCLVL V_ADCGAIN = 0dB 12.288MHz 48kHz, MAS = MCLK LRCLK = +25°C.) (Note 2) A MIN TYP MAX 0 -67 -68 500 100 100 -86 - 0.707 -3 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS dB dB ±3 mV dBV RMS dB ...
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... A MIN TYP MAX -63 -61 -59.5 +7.2 +8 +8.75 0 1kW 500 100 = ∞ SPK -73 -104 217Hz 1kHz 10kHz 61 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS µV RMS dB dB µV RMS dB ...
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... MAX = 5.0V 1400 = 4.2V 1000 = 3.7V 780 = 3.3V 600 = 3.0V 500 = 5.0V 1800 = 4.2V 1250 = 3.7V 970 = 3.3V 760 = 3.0V 620 = 5.0V 2600 = 4.2V 1800 = 3.7V 1400 = 3.3V 1050 = 3.0V 850 = 5.0V 3200 = 4.2V 2200 = 3.7V 1700 = 3.3V 1350 = 3.0V 1100 0x00 -51 -48 -44.5 = 0x1F Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS RMS ...
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... MAS = MCLK LRCLK = +25°C.) (Note 2) A MIN TYP MAX ±0.5 -65 -65 102 94 = 16W -86 = 32W -88 = 10kW - 10kW -105 -104 = 32W 2.2 1.1 4.5 0. 101 -80 -94 = 32W Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS ±4 mV dBV dB - ...
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... T MAX 500 100 -73 -73 0.80 x 0. MICBIAS MICBIAS MICBIAS 0.80 x 0. SPKLVDD SPKLVDD SPKLVDD Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS RMS ±1 mV ±3 pF dBV V ...
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... A V_ADCLVL V_ADCGAIN = 0dB 12.288MHz 48kHz, MAS = MCLK LRCLK = +25°C.) (Note 2) A MIN TYP MAX 0.06 x 0. MICBIAS MICBIAS MICBIAS 0.06 x 0. SPKLVDD SPKLVDD SPKLVDD V SPKLVDD 1.9 2.4 2 200 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS V V kΩ 12 µA ms ...
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... S 0.449 -0.1 0.1 0. < 50kHz) LRCLK -0.1 +0.1 0. > 50kHz) LRCLK 0.208 0. -0.1 +0.1 0. Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS ...
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... MCLK LRCLK = +25°C.) (Notes 2, 10) A MIN TYP MAX 90 - 0.0008 0. 0.002 0.0008 0.0008 -60.5 -0 8kHz 1 16kHz 0 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS ...
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... A 6 MIN TYP MAX 0.448 0.451 -0.1 +0.1 0.476 < 50kHz) LRCLK -0.1 +0.1 0. > 50kHz) LRCLK 0. 0. -0.1 +0.1 0.477 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL dB UNITS ...
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... A 89 MIN TYP MAX 0 12 -31 0 -66 -35 0.0005 0.2 0.0625 8 7 -12 +12 - 0.0008 0. 0.002 0.0008 0.0008 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL dB UNITS dB dBFS dBFS s s Bands ...
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... A MIN TYP MAX 1. DVDDIO 0 DVDDIO 100 - DVDDIO - 0 DVDDIO 0 DVDDIO 100 - 0 DVDDIO 1 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS V V µ µ µ µ µA ...
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... A V_ADCLVL V_ADCGAIN = 0dB 12.288MHz 48kHz, MAS = MCLK LRCLK = +25°C.) (Note 2) A MIN TYP MAX 0. DVDDIO 0. DVDDIO 100 -25 + AVDD 0. AVDD 100 AVDD 0.4 0.4 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS µ ...
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... BIAS MICBIAS = A = 0dB, A V_ADCLVL V_ADCGAIN = 0dB 12.288MHz 48kHz, MAS MCLK LRCLK = +25°C.) (Notes 2, 10) A MIN TYP MAX 2.048 12.288 -0.025 +0.025 2 7 ±100 10 Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS MHz % ns kHz % ...
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... BIAS MICBIAS = A = 0dB, A V_ADCLVL V_ADCGAIN = 0dB 12.288MHz 48kHz, MAS = MCLK LRCLK = +25°C.) (Note 2) A MIN TYP MAX -15 +15 0 BCLK Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS ...
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... HIZOUT CLKTX LSB HI-Z t SETUP LSB MSB SLAVE MODE t BCLK t BCLKH t SYNCHOLD t CLKTX LSB HI-Z MSB t HOLD LSB MSB SLAVE MODE t BCLK t BCLKH t SYNCTX LSB HI-Z MSB t SETUP LSB MSB SLAVE MODE Maxim Integrated │ BCLKL MSB t HOLD t BCLKL t SETUP t BCLKL t CLKTX t HOLD ...
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... TYP MAX 0 400 1.3 0.6 1.3 0.6 0.6 0 900 0 900 0 100 20 + 0.1 300 0.1 300 0.1 250 0.6 400 BUF SU,STO START STOP CONDITION CONDITION Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS kHz µs µs µs µs µ µ ...
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... A MIN TYP MAX f /2 PCLK f /3 PCLK f /4 PCLK f /5 PCLK f /6 PCLK f /8 PCLK 20 0 RIGHT differential analog RMS = +25° ratios can exhibit some full- MCLK LRCLK Maxim Integrated │ connected ) connected = C1N-C1P = V_DACLVL UNITS MHz ns ns ...
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... LOAD www.maximintegrated.com Ultra-Low Power Stereo Audio Codec = 1.2V DVDD SPKLVDD SPKRVDD AVDD HPVDD DVDD (mA) (mA) (mA) 1.39 1.28 1.04 0.94 0.51 1.02 1.39 1.28 1.11 1.39 1.28 1.65 1.39 1.28 1.17 1.40 1.29 1.00 0.96 0.51 1. 3.7V, slave mode operation.) SPKVDD I I POWER DVDDIO SPK_VDD (mA) (mA) (mW) 0.02 0.00 6.05 0.02 0.00 3.84 0.02 0.00 6.14 0.02 0.00 6.78 0.02 0.00 6.21 0.02 0.00 6.03 0.02 0.00 3.85 Maxim Integrated │ 31 DYNAMIC RANGE (dB) 102 99 102 102 102 102 99 ...
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... L = 68µH LOAD LOAD www.maximintegrated.com Ultra-Low Power Stereo Audio Codec = 1.2V DVDD SPKLVDD SPKRVDD AVDD HPVDD DVDD (mA) (mA) (mA) 1.35 1.28 0.89 0.91 0.51 0.89 0.78 0.69 0.82 0.56 0.30 0.82 1.35 1.28 0.94 0.91 0.50 0.94 1.10 0.00 1.04 0.91 0.00 1.03 0.65 0.00 0.90 0.51 0.00 0.90 1.21 0.00 1.17 1.21 0.00 1. 3.7V, slave mode operation.) SPKVDD I I POWER DVDDIO SPK_VDD (mA) (mA) (mW) 0.02 0.00 5.81 0.02 0.00 3.62 0.02 0.00 3.64 0.02 0.00 2.55 0.02 0.00 5.87 0.02 0.00 3.68 0.02 2.18 11.47 0.02 2.18 10.93 0.02 1.11 6.36 0.02 1.11 6.09 0.02 2.18 11.61 0.02 2.18 11.50 Maxim Integrated │ 32 DYNAMIC RANGE (dB) 101 98.5 101 98 ...
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... MCLK S low power mode www.maximintegrated.com Ultra-Low Power Stereo Audio Codec = 1.2V DVDD SPKLVDD SPKRVDD AVDD HPVDD DVDD (mA) (mA) (mA) 3.09 0.00 1.38 1.97 0.00 1.39 3.10 0.00 1.46 1.86 0.00 1.10 3.19 0.00 1.35 2.02 0.00 1.35 2.90 0.00 0.90 1.73 0.00 0. 3.7V, slave mode operation.) SPKVDD I I POWER DVDDIO SPK_VDD (mA) (mA) (mW) 0.02 0.00 7.19 0.02 0.00 5.21 0.02 0.00 7.30 0.02 0.00 4.65 0.02 0.00 7.33 0.02 0.00 5.24 0.02 0.00 6.28 0.02 0.00 4.20 Maxim Integrated │ 33 DYNAMIC RANGE (dB ...
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... MCLK S low power mode www.maximintegrated.com Ultra-Low Power Stereo Audio Codec = 1.2V DVDD SPKLVDD SPKRVDD AVDD HPVDD DVDD (mA) (mA) (mA) 3.50 0.00 1.36 2.22 0.00 1.38 2.02 0.00 1.05 1.35 0.00 1.08 3.20 0.00 0.91 1.93 0.00 0.92 1.87 0.00 0.82 1.20 0.00 0.83 3.26 0.00 1.11 1.98 0.00 1.12 1.90 0.00 0.94 1.23 0.00 0. 3.7V, slave mode operation.) SPKVDD I I POWER DVDDIO SPK_VDD (mA) (mA) (mW) 0.02 0.00 7.88 0.02 0.00 5.65 0.02 0.00 4.90 0.02 0.00 3.74 0.02 0.00 6.81 0.02 0.00 4.57 0.02 0.00 4.35 0.02 0.00 3.18 0.02 0.00 7.16 0.02 0.00 4.91 0.02 0.00 4.54 0.02 0.00 3.35 Maxim Integrated │ 34 DYNAMIC RANGE (dB ...
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... Stereo Single-Ended Line Input to Line Output (R = 10kΩ) LOAD www.maximintegrated.com Ultra-Low Power Stereo Audio Codec = 1.2V DVDD SPKLVDD SPKRVDD AVDD HPVDD DVDD (mA) (mA) (mA) 2.85 0.00 1.39 1.84 0.00 1.39 1.61 0.00 1.08 1.09 0.00 1.09 1.12 2.42 0.00 0.72 1.57 0.00 1.07 1.26 0.00 0.36 0.00 0.00 0.31 0.00 0.00 0.76 0.00 0. 3.7V, slave mode operation.) SPKVDD I I POWER DVDDIO SPK_VDD (mA) (mA) (mW) 0.02 0.00 6.76 0.02 0.00 4.98 0.02 0.00 4.20 0.02 0.00 3.29 0.00 0.00 6.34 0.00 0.00 3.41 0.00 0.00 4.19 0.00 2.08 8.34 0.00 1.04 4.42 0.00 0.74 4.12 Maxim Integrated │ 35 DYNAMIC RANGE (dB 100 ...
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... SPKRVDD AVDD HPVDD DVDD (mA) (mA) (mA) 2.67 0.00 0.95 1.94 0.00 0.95 2.69 0.69 1.22 1.80 0.30 1.24 2.54 0.69 0.95 1.66 0.30 0.96 4.44 1.28 1.14 2.73 0.51 1. 3.7V, slave mode operation.) SPKVDD I I POWER DVDDIO SPK_VDD (mA) (mA) (mW) 0.02 0.73 8.61 0.02 0.73 7.31 0.02 0.00 7.51 0.02 0.00 5.26 0.02 0.00 6.93 0.02 0.00 4.67 0.02 0.00 11.54 0.02 0.00 7.18 Maxim Integrated │ 36 DYNAMIC RANGE (dB) REC: 99 PB: 100 REC: 99 PB: 98 REC: 97 PB: 102 REC: 97 PB: 99 REC: 99 PB: 102 REC: 99 PB: 99 REC: 99 PB: 102 REC: 99 PB: 99 ...
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... FREQUENCY (Hz) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (MIC TO ADC 13MHz MCLK - 8kHz LRCLK - 22.4mV IN RMS A = +30dB V_MIC - 10µF IN -40 -50 -60 -70 -80 -90 -100 10k 10 100 FREQUENCY (Hz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 10k 100k 1k 10k ...
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... INBAND OUTPUT SPECTRUM, -3dBFS INPUT (MIC TO ADC 8kHz f = 0dB -20 = 10µF -40 -60 -80 -100 -120 -140 -160 3500 4000 FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 10k 100k f = 13MHz MCLK = 44.1kHz LRCLK A = 0dB V_MIC C = 10µ ...
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... FREQUENCY (kHz) INBAND OUTPUT SPECTRUM, -60dBFS INPUT (MIC TO ADC 12.288MHz MCLK f = 96kHz LRCLK A = 0dB V_MIC C = 10µ FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL = 12.288MHz f = 48kHz LRCLK A = 0dB V_MIC C = 10µ ...
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... INBAND OUTPUT SPECTRUM, -10dBFS INPUT (DIGITAL MIC TO RECORD PATH DMICCLK -20 -40 -60 -80 -100 -120 -140 -160 10k FREQUENCY (Hz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL f = 13MHz MCLK f = 8kHz LRCLK = 3.25MHz A = 0dB V_DMIC 3000 3500 4000 f = 13MHz MCLK ...
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... INBAND OUTPUT SPECTRUM, -60dBFS INPUT (DIGITAL MIC TO RECORD PATH MCLK -20 DMICCLCK = 0dB A -40 -60 -80 -100 -120 -140 -160 20k 0 5k 10k FREQUENCY (Hz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 10k 100k = 12.288MHz = 48kHz LRCLK = 3.072MHz = 0dB V_DMIC 15k 20k ...
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... FREQUENCY (Hz) CROSSTALK vs. FREQUENCY (LINE TO ADC 12.288MHz MCLK f = 48kHz -20 LRCLK V = 0.5mV IN RMS A = 0dB -40 V_LINEPRE C = 10µF IN -60 SINGLE-ENDED -80 -100 -120 DIFFERENTIAL -140 100k 10 100 1k FREQUENCY (Hz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 10k 100k 10k 100k ...
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... FREQUENCY (kHz) CROSSTALK vs. FREQUENCY (INPUT DIRECT TO ADC MIXER 12.288MHz MCLK f = 48kHz LRCLK - 0.5V IN RMS C = 10µF IN -40 -60 -80 RIGHT TO LEFT -100 -120 LEFT TO RIGHT -140 100k 10 100 1k FREQUENCY (Hz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 10k 100k ...
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... FREQUENCY (kHz) INBAND OUTPUT SPECTRUM, -3dBFS INPUT (LINE TO ADC TO DAC TO HEADPHONE MCLK 0 f LRCLK A -20 -40 -60 -80 -100 -120 -140 -160 100k FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL = 13MHz = 44.1kHz = 0dB V_TOTAL 10µ ...
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... FREQUENCY (DAC TO RECEIVER 13MHz MCLK - 8kHz LRCLK A = +8dB -20 V_REC R = 32I REC -30 -40 P OUT -50 -60 -70 -80 P OUT -90 -100 0.10 0.12 10 100 FREQUENCY (Hz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL = 12.288MHz f = 48kHz LRCLK A = 0dB V_TOTAL 10µ 25mW = 50mW 1k 10k ...
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... INBAND OUTPUT SPECTRUM, -60dBFS INPUT (DAC TO RECEIVER 13MHz 0 = 8kHz = 0dB -20 = 32I -40 -60 -80 -100 -120 -140 -160 FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL f = 13MHz MCLK f = 8kHz LRCLK VCM_MODE = 1 THD+N ≤ +8dB V_REC 100 120 140 ...
Page 47
... FREQUENCY (Hz) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (LINE TO RECEIVER) 120 100 SPK_VDD 80 60 OTHER SUPPLIES 40 DIFFERENTIAL INPUT V = 100mV RIPPLE P 32I REC C = 10µ 100 1k 10k 100k FREQUENCY (Hz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL = 25mW 10k 100k ...
Page 48
... FREQUENCY (kHz) INBAND OUTPUT SPECTRUM, -60dBFS INPUT (DAC TO LINE OUT 13MHz MCLK 8kHz LRCLK A = +3dB V_LOUT - 10kI LOUT -40 -60 -80 -100 -120 -140 -160 FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL ...
Page 49
... FREQUENCY (Hz) INBAND OUTPUT SPECTRUM, -60dBV INPUT (LINE IN TO LINE OUT 0dB V_LINEPGA +3dB V_LOUT R = 10kI LOUT - 10µF IN -40 -60 -80 -100 -120 -140 -160 FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 10k 100k ...
Page 50
... TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER 4.2V SPK_VDD - 12.288MHz MCLK f = 48kHz -20 LRCLK f = 6000Hz +8dB V_SPKPGA - 33µH SPK -40 -50 -60 -70 - 100Hz IN -100 3.0 3.5 0 0.5 1.0 1.5 OUTPUT POWER (W) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL f = 1000Hz IN 1.0 1.2 = 1000Hz IN 2.0 2.5 ...
Page 51
... TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO SPEAKER SPK_VDD - 12.288MHz MCLK f = 48kHz -20 LRCLK A = +8dB V_SPKPGA - 33µH SPK -40 - 2.00W OUT -60 -70 - 0.50W OUT -90 -100 100k 10 100 1k FREQUENCY (Hz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 10k 100k 10k 100k ...
Page 52
... SUPPLY VOLTAGE (V) EFFICIENCY vs. OUTPUT POWER (DAC TO SPEAKER) 100 SPK 68µH 70 SPK SPK_VDD f MCLK 20 f LRCLK 10 A V_SPKPGA 0 100k 0 0.5 1.0 1.5 2.0 OUTPUT POWER PER CHANNEL (W) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 4.5 5.0 5 33µ 12.288MHz = 48kHz = +8dB 3.5 2.5 3.0 ...
Page 53
... SPK 3.5 3.0 2.5 2.0 1.5 1.0 0.5 = +8dB 0 1.75 2.00 2.5 3.0 3.5 4.0 SUPPLY VOLTAGE (V) INBAND OUTPUT SPECTRUM, -3dBFS INPUT (DAC TO SPEAKER MCLK 0 A -20 Z -40 -60 -80 -100 -120 -140 -160 100k FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 4.5 5.0 5.5 = 12.288MHz f = 48kHz LRCLK = -6dB V_SPKPGA = 8I + 68µH SPK 15 20 ...
Page 54
... FREQUENCY (kHz) WIDEBAND FREQUENCY SPECTRUM (DAC TO SPEAKER MCLK f -20 A V_SPKPGA = -6dB Z SPK -40 -60 -80 -100 -120 20 0 FREQUENCY (MHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL = 13MHz MCLK = 44.1kHz = -6dB = 8I + 68µ 12.88MHz = 48kHz LRCLK = 0dB = 8W + 68µH 100 ...
Page 55
... FREQUENCY (Hz) INBAND OUTPUT SPECTRUM, -3dBV INPUT (LINE TO SPEAKER V_LINEPGA A -20 V_SPKPGA Z SPK -40 -60 -80 -100 -120 -140 100k FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 10k 100k = -6dB = 0dB = 8I + 68µ 10µ ...
Page 56
... OUTPUT POWER (W) TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE 12.288MHz -10 MCLK f = 48kHz LRCLK - +3dB V_HP R = 16I - 1000Hz -50 - 100Hz f = 6000Hz -70 -80 -90 -100 0.05 0 0.01 0.02 0.03 0.04 OUTPUT POWER (W) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 0.04 0.05 0.05 0.06 0.07 ...
Page 57
... TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO HEADPHONE 12.288MHz MCLK - 96kHz LRCLK - +3dB V_HP -30 -40 -50 - 0.02W OUT - 0.01W OUT -80 -90 -100 100k 10 100 1k FREQUENCY (Hz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 10k 10k 100k ...
Page 58
... FREQUENCY (Hz) POWER CONSUMPTION vs. OUTPUT POWER (DAC TO HEADPHONE) 120 f = 12.288MHz MCLK f = 48kHz LRCLK 100 A = +3dB V_HP 100k 0.1 1 OUTPUT POWER PER CHANNEL (mW) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 10k 100k = 16I = 32I HP 10 100 ...
Page 59
... FREQUENCY (Hz) INBAND OUTPUT SPECTRUM, -60dBFS INPUT (DAC TO HEADPHONE 13MHz 0 = 8kHz = 0dB -20 -40 -60 -80 -100 -120 -140 -160 FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL 10k 100k f = 13MHz MCLK f = 8kHz LRCLK A = 0dB V_HP R = 32I ...
Page 60
... INBAND OUTPUT SPECTRUM, -60dBFS INPUT (DAC TO HEADPHONE MCLK 0 f LRCLK A V_HP - -40 -60 -80 -100 -120 -140 -160 FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL = 12.288MHz = 48kHz = 0dB = 32I 12.288MHz = 96kHz = 0dB = 32I 15 20 ...
Page 61
... FREQUENCY (kHz) INBAND OUTPUT SPECTRUM, -60dBFS INPUT (DAC TO HEADPHONE 12.288MHz MCLK 48kHz LRCLK A = 0dB V_HP - 16I HP -40 -60 -80 -100 -120 -140 -160 FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL ...
Page 62
... OUT P = 20mW OUT -80 -90 -100 10 100 1k 10k 100k FREQUENCY (Hz) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (LINE TO HEADPHONES) 120 V = 100mV RIPPLE P 32I HP 100 C = 10µ VCM_MODE = VCM_MODE = 100 1k 10k 100k FREQUENCY (Hz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL ...
Page 63
... V_LINEPGA 0 10 100 1k 10k 100k FREQUENCY (Hz) INBAND OUTPUT SPECTRUM, -60dBFS INPUT (LINE TO HEADPHONE 0dB V_LINEPGA 0dB V_HP R = 32I HP - 10µF IN -40 -60 -80 -100 -120 -140 -160 FREQUENCY (kHz) Maxim Integrated │ connected ) con- SPK C1N-C1P = V_DACLVL ...
Page 64
... Ultra-Low Power Stereo Audio Codec BCLK IRQ 34 35 MCLK MAX98090 36 SCL 37 SDA C1P 40 C1N TQFN (5mm x 5mm x 0.75mm IN3 19 IN1/DMD 18 IN2/DMC 17 SPKLGND 16 SPKLP 15 SPKLN 14 SPKLVDD 13 SPKRVDD 12 SPKRP 11 SPKRN 9 10 Maxim Integrated │ 64 ...
Page 65
... SPKLP SPKLN SPKLGND N.C. SPKVDD SPKVDD JACKSNS N.C. N.C. IN5 N.C. HPSNS SCL IN6 N.C. SDA N.C. N.C. SDIN C1N C1P IRQB LRCLK CPVSS HPVDD MCLK BCLK WLP (3.15mm x 3.15 mm, 0.4 PITCH IN1/DMD IN3 IN2/DMC IN4 MICBIAS REF AGND BIAS AVDD DVDDIO DVDD SDOUT DGND Maxim Integrated │ 65 ...
Page 66
... Common-Mode Reference Voltage. Bypass to AGND with a 1µF capacitor. Analog Ground. Analog Power Supply. Bypass to AGND with a 1µF capacitor. Digital Power Supply. Bypass to DGND with a 1µF capacitor. Digital Audio Interface Power-Supply Input. Bypass to DGND with a 1µF capacitor. Maxim Integrated │ 66 ...
Page 67
... Speaker and Microphone Bias Power Supply. Bypass to SPK_GND with a 1µF capacitor. Auxiliary Negative Differential Microphone Input or Single-Ended Line Input. AC-couple with a series 1µF capacitor. Auxiliary Positive Differential Microphone Input or Single-Ended Line Input. AC-couple with a series 1µF capacitor. Not Connected Internally . DD or from 10MHz to S Maxim Integrated │ 67 ...
Page 68
... Registers 0x01, 0x02, and 0xFF are read only. Register 0x00 and all of the remain- ing registers are read/write. Write zeros to all unused bits in the register table when updating the register, unless otherwise noted. /2. For HPVDD Maxim Integrated │ 68 ...
Page 69
... M2SPKR M2EAR M2LOUTR IN65D IN65D_ IN34S_ 0x00 _BSPKR BEAR ABLOUT — — — 0x00 IN4SEEN IN5SEEN IN6SEEN 0x00 LINBPGA[2:0] 0x1B — EXT_MIC[1:0] 0x00 PGAM1[4:0] 0x14 PGAM2[4:0] 0x14 — MBVSEL[1:0] 0x00 — DIGMICR DIGMICL 0x00 — DMIC_FREQ[1:0] 0x00 Maxim Integrated │ 69 ...
Page 70
... AVBQ[3:0] 0x00 DVST[4:0] 0x00 — — — 0x00 — — USE_MI 0x00 0x00 0x00 0x00 0x00 BSEL[2:0] 0x00 DLY WS[1:0] 0x00 — FSW TDM 0x00 SLOTDLY[3:0] 0x00 HIZOFF SDOEN SDIEN 0x00 — — — 0x80 DV[3:0] 0x00 DVEQ[3:0] 0x00 Maxim Integrated │ 70 ...
Page 71
... DRCTHE[4:0] DRCG[4:0] — MIXRCVLG[1:0] RCVLVOL[4:0] — MIXRCVRG[1:0] RCVRVOL[4:0] — JDEB[1:0] LINEBEN ADREN ADLEN RCVREN DAREN DALEN ZDEN VS2EN VSEN Maxim Integrated │ 71 POR STATE 0x00 0x00 0x00 0x1A 0x1A 0x00 0x00 0x00 0x2C 0x2C 0x00 0x00 0x00 0x00 0x00 0x00 0x15 ...
Page 72
... EQ5BAND EQ7BAND 0x00 BIAS_ — — 0x00 MODE PERF — DACHP 0x00 MODE ADC OSR128 ADCHP 0x06 DITHER — — — 0x00 — — — — — — — — — — — — — — — Maxim Integrated │ 72 ...
Page 73
... A2_3[23:16] A2_3[15:8] A2_3[7:0] POR STATE BIT 2 BIT 1 BIT 0 — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — Maxim Integrated │ 73 ...
Page 74
... A2_5[23:16] A2_5[15:8] A2_5[7:0] POR STATE BIT 2 BIT 1 BIT 0 — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — Maxim Integrated │ 74 ...
Page 75
... A2_7[23:16] A2_7[15:8] A2_7[7:0] POR STATE BIT 2 BIT 1 BIT 0 — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — Maxim Integrated │ 75 ...
Page 76
... Reset all registers to their default POR values. This excludes the record biquad and playback parametric equalizer filter coefficients (Table 24 and Table 45). POR STATE BIT 2 BIT 1 BIT 0 — — — — — — — — — — — — — — — 0x43 — — — — — — — Maxim Integrated │ 76 ...
Page 77
... Low power headphone playback mode. 0: High performance headphone playback mode. DAC High-Performance Mode 0: DAC settings optimized for lowest power consumption. 1: DAC settings optimized for best performance. — — — — — — — — — — — — — Maxim Integrated │ 77 ...
Page 78
... ADC is optimized for best performance. Device Active-Low Global Shutdown Control 0: Device is in shutdown Device is active. Certain registers should not be written to while the device is active (Table 82). DESCRIPTION — — — — — DESCRIPTION — — — — — — — Maxim Integrated │ 78 ...
Page 79
... Line B input amplifier disabled. 1: Line B input amplifier enabled. Right ADC Enable 0 0: Right ADC disabled. 1: Right ADC enabled. Left ADC Enable 0 0: Left ADC disabled. 1: Left ADC enabled interface remains active and all device DESCRIPTION — — — Maxim Integrated │ 79 ...
Page 80
... Right line output disabled. 1: Right line output enabled. Right DAC Digital Input Enable 0 0: Right DAC input disabled. 1: Right DAC input enabled. Left DAC Digital Input Enable 0 0: Left DAC input disabled. 1: Left DAC input enabled. DESCRIPTION . Maxim Integrated │ 80 ...
Page 81
... DIGITAL MIC DATA MIC DATA LEFT MUX LEFT MUX DMDL ADCL DMDR ADCR ADC ADC LEFT RIGHT ADLEN ADCHP ADREN OSR128 ADCDITHER ADC LEFT MIXER MIC 1 MIXADL[6:0] MIC 2 ADC RIGHT MIXER MIC 1 MIXADR[6:0] MIC 2 MAX98090 ANALOG OUTPUT MIXERS Maxim Integrated │ 81 ...
Page 82
... LINE B MAX98090 MIC 2 MIC 2 PREAMP PGA 0dB 0dB TO 20dB 10dB 30dB PA2EN[1:0] PGAM2[4:0] MIXADL[6:0] IN1-IN2 IN3-IN4 IN5-IN6 ADC MIC 1 LEFT MIXER MIC 2 LINE A LINE B IN1-IN2 IN3-IN4 IN5-IN6 ADC MIC 1 RIGHT MIXER MIC 2 LINE A LINE B MIXADR[6:0] ANALOG OUTPUT MIXERS Maxim Integrated │ 82 ...
Page 83
... DESCRIPTION — DESCRIPTION — 10: 20dB 11: 30dB Maxim Integrated │ 83 ...
Page 84
... LEFT LEFT MIXER DMDR DIGITAL MAX98090 MIC RIGHT ADC MUX ADC ADCR RIGHT RIGHT MIXER DMICCLK / /8. This wide range of available PCLK DIGMICL LEFT RECORD PATH DSP FLEXSOUND DAI TECHNOLOGY DSP RIGHT RECORD PATH DSP DIGMICR Maxim Integrated │ can ...
Page 85
... DESCRIPTION — 100 DMICCLK PCLK 101 DMICCLK PCLK 110: Reserved 111: Reserved — — Maxim Integrated │ 85 19.2MHz — 6.4MHz 4.8MHz 3.84MHz 3.2MHz 2.4MHz ...
Page 86
... Digital Microphone Frequency Range Configuration 0 00: f < 3.5MHz DIGMICCLK 01: 3.5MHz ≤ f < 4.5MHz DIGMICCLK If any of the system clock quick configuration bits in register 0x04 are set, then the 0 frequency range configuration is automatically decoded. DESCRIPTION — — 10: 4.5MHz ≤ f DIGMICCLK 11: Reserved Maxim Integrated │ 86 ...
Page 87
... MCLK 12.288MHz MCLK Maxim Integrated │ ...
Page 88
... MCLK 16 32 44.1 — — — 256 x f MCLK 44 Maxim Integrated │ — ...
Page 89
... Selects IN5 single ended as an input to the line A mixer (WLP only). 0 Selects IN6 single ended as an input to the line B mixer (WLP only). MIXADL[6:0] IN1-IN2 IN3-IN4 IN5-IN6 ADC MIC 1 LEFT MIC 2 MIXER LINE A LINE B IN1-IN2 IN3-IN4 IN5-IN6 ADC MIC 1 RIGHT MIC 2 MIXER LINE A LINE B MIXADR[6:0] ANALOG OUTPUT MIXERS DESCRIPTION Maxim Integrated │ 89 ...
Page 90
... DIFFERENTIAL (kΩ 112 160 = 20kΩ V IN_SINGLE-ENDED LINE A PGA V COMMON_MODE log (20kΩ/R V_EXTLINE S_EXT R S_EXT SINGLE-ENDED (kΩ) 84.5 115 165 237 SINGLE-ENDED LINE INPUT R = 20kΩ FB_INT+ R S_EXT+ LINE A PGA R = 15kΩ S_EXT 30kΩ FB_INT- Maxim Integrated │ ...
Page 91
... External Microphone (IN6, IN5) Input Control Configuration (WLP Only) 00: EXT_MIC not selected. 01: EXT_MIC selected on MIC 1. 0 DESCRIPTION 100: -3dB 101, 110, 111: -6dB 100: -3dB 101, 110, 111: -6dB DESCRIPTION — — — — 10: EXT_MIC selected on MIC 2. 11: EXT_MIC not selected. Maxim Integrated │ 91 ...
Page 92
... Figure 31). MIXADL[6:0] IN1-IN2 IN3-IN4 ADLEN IN5-IN6 ADC MIC 1 ADC LEFT LEFT MIXER MIC 2 LINE A LINE B ADCHP OSR128 ADCDITHER IN1-IN2 IN3-IN4 IN5-IN6 ADC ADC MIC 1 RIGHT RIGHT MIXER MIC 2 LINE A ADREN LINE B MAX98090 MIXADR[6:0] FLEXSOUND TECHNOLOGY DSP Maxim Integrated │ 92 ...
Page 93
... DMDR DIGITAL RIGHT MIC BIQUAD FILTERS RIGHT ADCR MUX RIGHT RECORD PATH FLEXSOUND TECHNOLOGY DSP LEFT LEFT LEFT LEVEL SIDETONE FILTER AVLG[2:0] AVL[3:0] DSTS[1:0] AVRG[2:0] AVR[3:0] RIGHT RIGHT RIGHT LEVEL SIDETONE FILTER L/R ST SIDETONE TO LEVEL PLAYBACK PATH DVST[3:0] Maxim Integrated │ 93 DAI ...
Page 94
... RIGHT LEVEL SIDETONE FILTER L/R ST SIDETONE TO LEVEL PLAYBACK PATH DVST[3:0] = 8kHz) and wideband (f = 16kHz) sampling S and cannot be manu- S < 256 then the OSR must be set PCLK S = 96kHz), then the OSR must be S regardless of the ratio. In any other S Maxim Integrated │ 94 DAI ...
Page 95
... Selects IN3/IN4 differential input direct to right ADC mixer. 0 Selects IN1/IN2 differential input direct to right ADC mixer. = 8kHz) and wide 16kHz) voice applications, while the FIR filters > 50kHz), use the FIR audio filters and set LRCLK DESCRIPTION — DESCRIPTION — Maxim Integrated │ 95 ...
Page 96
... BIQUAD SIDETONE FILTER AVLG[2:0] RECBQEN AVBQ[3:0] AVL[3:0] REC_B0[23:0] REC_B1[23:0] DSTS[1:0] AVRG[2:0] REC_B2[23:0] AVR[3:0] REC_A1[23:0] REC_A2[23:0] RIGHT RIGHT RIGHT LEVEL BIQUAD SIDETONE FILTER L/R ST SIDETONE TO LEVEL PLAYBACK PATH DVST[3:0] DESCRIPTION rates while utilizing lower power. S — — — — Maxim Integrated │ 96 DAI ...
Page 97
... B × H(z) = − 1 − × × DESCRIPTION — — — — DESCRIPTION — — — — 0x8: -8dB 0xC: -12dB 0x9: -9dB 0xD: -13dB 0xA: -10dB 0xE: -14dB 0xB: -11dB 0xF: -15dB Maxim Integrated │ 97 ...
Page 98
... Right channel 11: Left + right channel — 0x10: -30.5dB 0x18: -46.5dB 0x11: -32.5dB 0x19: -48.5dB 0x12: -34.5dB 0x1A: -50.5dB 0x13: -36.5dB 0x1B: -52.5dB 0x14: -38.5dB 0x1C: -54.5dB 0x15: -40.5dB 0x1D: -56.5dB 0x16: -42.5dB 0x1E: -58.5dB 0x17: -44.5dB 0x1F: -60.5dB Maxim Integrated │ 98 ...
Page 99
... DESCRIPTION — 100 : +24dB 110 : +36dB 101 : +30dB 111 : +42dB 0x8: -5dB 0xC: -9dB 0x9: -6dB 0xD: -10dB 0xA: -7dB 0xE: -11dB 0xB: -8dB 0xF: -12dB Maxim Integrated │ 99 ...
Page 100
... LOOP TDM, FSW THROUGH SLOTDLY[3:0] MUX SLOTL/R[1:0] INPUT SHIFT RJ, DLY REGISTER REGISTER WS[1:0] LOOP DATA INPUT LBEN SDIEN BACK MUX ENABLE 0 1 PLAYBACK DMONO INPUT MIXER DAI: DATA PATH TO DAC CLOCK L/R AUDIO GENERATION INPUT PLAYBACK PATH DSP Maxim Integrated │ 100 ...
Page 101
... LOOP TDM, FSW THROUGH SLOTDLY[3:0] MUX SLOTL/R[1:0] INPUT SHIFT RJ, DLY REGISTER REGISTER WS[1:0] DATA INPUT LOOP LBEN SDIEN BACK MUX ENABLE 0 1 PLAYBACK DMONO INPUT MIXER DAI: DATA PATH TO DAC CLOCK L/R AUDIO GENERATION INPUT PLAYBACK PATH DSP Maxim Integrated │ 101 ...
Page 102
... PCLK and then into LRCLK (and BCLK) based on the selected clock ratios. — — — — — — — — — — BCLK PCLK = f /4 BCLK PCLK = f /8 BCLK PCLK = f /16 BCLK PCLK × LRCLK PCLK MI OSR × Maxim Integrated │ 102 ...
Page 103
... Setup clocks and filters for a 48kHz sample rate. Setup clocks and filters for a 44.1kHz sample rate. Setup clocks and filters for a 16kHz sample rate. Setup clocks and filters for an 8kHz sample rate. — MHz master clock (MCLK) S — — Maxim Integrated │ 103 ...
Page 104
... OSR = 64 OSR = 128 OSR = 64 — — — OSR = 64 = 8kHz/16kHz operation S Other combinations are reserved 1001 12MHz 16kHz PCLK LRCLK 1011 13MHz 16kHz PCLK LRCLK 1101 16MHz 16kHz PCLK LRCLK 1111 19.2MHz 16kHz PCLK LRCLK — — — Maxim Integrated │ 104 ) S ...
Page 105
... DESCRIPTION Upper half of the PLL N value used in master mode clock generation to calculate the frequency ratio (manual ratio master mode GCD PCLK / PCLK OSR MI/f OSR PCLK — Maxim Integrated │ 105 ...
Page 106
... Upper half of the PLL M value used in master mode clock generation to calculate an accurate noninteger frequency ratio (manual ratio master mode). DESCRIPTION Lower half of the PLL M value used in master mode clock generation to calculate an accurate noninteger frequency ratio (manual ratio master mode). Maxim Integrated │ 106 ...
Page 107
... LOOP TDM, FSW THROUGH SLOTDLY[3:0] MUX SLOTL/R[1:0] INPUT SHIFT RJ, DLY REGISTER REGISTER WS[1:0] LOOP DATA INPUT LBEN SDIEN ENABLE BACK MUX 0 1 PLAYBACK DMONO INPUT MIXER DAI: DATA PATH TO DAC CLOCK L/R AUDIO GENERATION INPUT PLAYBACK PATH DSP Maxim Integrated │ 107 ...
Page 108
... INPUT MIXER L/R AUDIO L/R AUDIO (RECORD) (PLAYBACK) SDOUT SDIN PATH 6: DATA OUTPUT RECORD/ ENABLE LOOP THROUGH LOOP THROUGH MUX OUTPUT SHIFT INPUT SHIFT REGISTER REGISTER LOOP DATA INPUT BACK ENABLE MUX PLAYBACK INPUT MIXER L/R AUDIO L/R AUDIO (RECORD) (PLAYBACK) Maxim Integrated │ 108 ...
Page 109
... Enables the Serial Data Input (SDIN/Loop-Through Serial data input enabled. 0: Serial data input disabled. SDIEN LTEN All other combinations DESCRIPTION — — Maxim Integrated │ 109 LBEN ...
Page 110
... DAI Input Data Word Size 00: 16 bits 10: 24 bits 00: 16 bits 01, 10, 11: 20 bits 2 S (Figure 19), left justified (Figure 20) DESCRIPTION — — Standard) S standard. DLY is only effective when TDM = 0. 01: 20 bits 11: Reserved Maxim Integrated │ 110 ...
Page 111
... D15 D14 D13 D12 D11 D10 LEFT HIZ D15 D14 D13 D12 D11 D10 D15 D14 D13 D12 D11 D10 RIGHT HIZ RIGHT HIZ RIGHT HIZ RIGHT HIZ Maxim Integrated │ 111 ...
Page 112
... D15 D14 D13 D12 D11 D10 LEFT HIZ D1 D0 D15 D14 D13 D12 D11 D10 D15 D14 D13 D12 D11 D10 RIGHT HIZ RIGHT HIZ RIGHT HIZ Maxim Integrated │ 112 ...
Page 113
... Enables data delay for slot 3 in TDM mode. 0 Enables data delay for slot 2 in TDM mode. 0 Enables data delay for slot 1 in TDM mode. DESCRIPTION — — — — — — DESCRIPTION 10: Time slot 3 11: Time slot 4 10: Time slot 3 11: Time slot 4 Maxim Integrated │ 113 ...
Page 114
... L1 L0 R15 R14 R13 R12 R11 R10 R15 R14 R13 R12 R11 R10 CYCLES 16 CYCLES HI-Z HI-Z HI-Z 16 CYCLES HI-Z Maxim Integrated │ 114 ...
Page 115
... DRCTHE[4:0] A2_EQ_[23:0] RIGHT 7-BAND RIGHT ALC: RIGHT PARAMETRIC AUTOMATIC LEVEL EQUALIZER LEVEL CONTROL RIGHT PLAYBACK PATH FLEXSOUND TECHNOLOGY DSP DALEN LEFT DAC FILTERS LEFT MODE DACHP PERFMODE DHPF RIGHT DAC FILTERS RIGHT DAREN Maxim Integrated │ 115 TO THE ANALOG OUTPUT MIXERS ...
Page 116
... LEFT DAC FILTERS LEFT MODE DACHP PERFMODE DHPF RIGHT DAC FILTERS RIGHT DAREN DESCRIPTION — 10: +12dB 11: +18dB 0x8: -8dB 0xC: -12dB 0x9: -9dB 0xD: -13dB 0xA: -10dB 0xE: -14dB 0xB: -11dB 0xF: -15dB Maxim Integrated │ 116 TO THE ANALOG OUTPUT MIXERS ...
Page 117
... LEVEL EQUALIZER LEVEL CONTROL RIGHT PLAYBACK PATH that varies by filter type. See the Electrical C FLEXSOUND TECHNOLOGY DSP DALEN LEFT DAC FILTERS LEFT MODE DACHP PERFMODE DHPF RIGHT DAC FILTERS RIGHT DAREN Maxim Integrated │ 117 , see V_EQ TO THE ANALOG OUTPUT MIXERS ...
Page 118
... DESCRIPTION — — — — DESCRIPTION — — — ) V_EQ 0x8: -8dB 0xC: -12dB 0x9: -9dB 0xD: -13dB 0xA: -10dB 0xE: -14dB 0xB: -11dB 0xF: -15dB Maxim Integrated │ 118 ...
Page 119
... Equalizer Band N 0x9B 0xAA Coefficient A1 0x9C 0xAB 0x9D 0xAC Equalizer Band N 0x9E 0xAD Coefficient A2 0x9F 0xAE is fixed at 1). They 0 TYPE COEFFICIENT SEGMENT R/W B0_N[23:16] R/W B0_N[15:8] R/W B0_N[7:0] R/W B1_N[23:16] R/W B1_N[15:8] R/W B1_N[7:0] R/W B2_N[23:16] R/W B2_N[15:8] R/W B2_N[7:0] R/W A1_N[23:16] R/W A1_N[15:8] R/W A1_N[7:0] R/W A2_N[23:16] R/W A2_N[15:8] R/W A2_N[7:0] Maxim Integrated │ 119 ...
Page 120
... RATIO = 1:2 -120 APPLICATION INPUT NOISE FLOOR DYNAMIC RANGE -140 0 -140 -120 -100 -80 -60 -40 -20 INPUT AMPLITUDE (dBFS) DRC ENABLED WITH GAIN FULL SCALE 0 - +10dB -40 V_ALC -60 -80 -100 -120 0 -120 -100 -80 -60 -40 -20 INPUT AMPLITUDE (dBFS) Maxim Integrated │ 120 0 0 ...
Page 121
... INF:1 -40 -50 -60 0 -60 -50 -40 -30 -20 -10 INPUT AMPLITUDE (dBFS) EXPANSION THRESHOLD -30 -35dB -40dB -40 -45dB -50dB -50 EXPANSION -55dB RATIO = 1:2 -60dB -60 -65dB THRESHOLD -70 OPTIONS -80 -90 -30 -90 -80 -70 -60 -50 INPUT AMPLITUDE (dBFS) Maxim Integrated │ 121 0dB -5dB -10dB -15dB -20dB -25dB -30dB 0 -40 -30 ...
Page 122
... This delay is centered at 12dB above the expan- sion threshold and is determined by the selected release time. There is no delay prior to the attack time when exit- ing expansion. COMPRESSION RELEASE TIME (2:1) COMPRESSED AMPLITUDE AMPLITUDE DECECREASES RELEASE TIME RELEASED AMPLITUDE Maxim Integrated │ 122 ...
Page 123
... DESCRIPTION 0x10: -16dB 0x18: -24dB 0x11: -17dB 0x19: -25dB 0x12: -18dB 0x1A: -26dB 0x13: -19dB 0x1B: -27dB 0x14: -20dB 0x1C: -28dB 0x15: -21dB 0x1D: -29dB 0x16: -22dB 0x1E: -30dB 0x17: -23dB 0x1F: -31dB Maxim Integrated │ 123 ...
Page 124
... DESCRIPTION — 0x10: -51dB 0x18: -59dB 0x11: -52dB 0x19: -60dB 0x12: -53dB 0x1A: -61dB 0x13: -54dB 0x1B: -62dB 0x14: -55dB 0x1C: -63dB 0x15: -56dB 0x1D: -64dB 0x16: -57dB 0x1E: -65dB 0x17: -58dB 0x1F: -66dB Maxim Integrated │ 124 ...
Page 125
... AUTOMATIC LEVEL EQUALIZER LEVEL CONTROL RIGHT PLAYBACK PATH DESCRIPTION rates while utilizing S — — — — FLEXSOUND TECHNOLOGY DSP DALEN DAC LEFT FILTERS LEFT MODE DACHP PERFMODE DHPF RIGHT DAC FILTERS RIGHT DAREN Maxim Integrated │ 125 TO THE ANALOG OUTPUT MIXERS ...
Page 126
... MIC 2 MIXER LINE A MIXHPR[5:0] HPVOLR[4:0] LINE B MIXHPRG[1:0] HPRM HPREN RCVP/ LOUTL ZDEN VS2EN VSEN RCVN/ LOUTR SPKLGND SPKLP SPKLN SPK_VDD SPKRP SPKRN SPKRGND HPL HPSNS HPR HPVDD HEADPHONE DIRECT DRIVE HPGND CHARGE PUMP CPVSS CPVDD C1N C1P Maxim Integrated │ 126 ...
Page 127
... Click-and-Pop Reduction (in resistive divider BIAS AVDD RCVLVOL[4:0] RCVLM RCVLEN RCVP/ -62dB TO 8dB LOUTL LINE OUT LEFT PGA ZDEN VS2EN ZSEN RCVN/ RCV/ -62dB TO 8dB LOUTR LINE LINE OUT OUT RIGHT PGA MUX MAX98090 RCVRVOL[4:0] RCVRM RCVREN Maxim Integrated │ 127 sec- ...
Page 128
... Selects DAC left as the input to the receiver/line out left mixer. RCVLVOL[4:0] RCVLM RCVLEN -62dB TO 8dB LINE OUT LEFT PGA ZDEN LINMOD VS2EN ZSEN RCV/ -62dB TO 8dB LINE LINE OUT OUT RIGHT PGA MUX MAX98090 RCVRVOL[4:0] RCVRM RCVREN DESCRIPTION — — Maxim Integrated │ 128 RCVP/ LOUTL RCVN/ LOUTR ...
Page 129
... Maxim Integrated │ 129 ...
Page 130
... Maxim Integrated │ 130 ...
Page 131
... MIC 1 RIGHT MIC 2 MIXER LINE A MIXSPL[5:0] LINE B MIXSPLG[1:0] SPVOLL[4:0] SPKLGND SPLM SPLEN -48dB TO 14dB SPKLP SPEAKER 6dB SPKLN LEFT PGA ZDEN VS2EN ZSEN SPK_VDD SPKSLAVE -48dB TO 14dB SPKRP SPEAKER SPKRN 6dB RIGHT PGA SPVOLR[4:0] SPKRGND SPLM SPREN Maxim Integrated │ 131 ...
Page 132
... Selects right DAC output to right speaker mixer. Selects left DAC output to right speaker mixer. Right-Speaker Mixer Gain Configuration 00: +0dB 10: -9.5dB 01: -6dB 11: -12dB Left-Speaker Mixer Gain Configuration 00: +0dB 10: -9.5dB 01: -6dB 11: -12dB DESCRIPTION — — DESCRIPTION — DESCRIPTION — — — — Maxim Integrated │ 132 ...
Page 133
... Maxim Integrated │ 133 ...
Page 134
... Filterless Class D Speaker Operation HPVOLL[4:0] HPLM HPLEN HP -67dB TO 3dB HEADPHONE LEFT LEFT PGA MUX ZDEN VS2EN ZSEN HP -67dB TO 3dB HEADPHONE RIGHT PGA MUX HPVOLR[4:0] HEADPHONE HPRM DIRECT DRIVE HPREN CHARGE PUMP C1P C1N CPVDD CPVSS Maxim Integrated │ 134 HPL HPSNS HPR HPVDD HPGND ...
Page 135
... Select Headphone Mixer as Left Input Source (Default DAC Left Direct) 0: DAC only source (best dynamic range and power consumption) 1: Headphone mixer source Right-Headphone Mixer Gain Configuration 00: +0dB 10: -9.5dB 01: -6dB 11: -12dB Left-Headphone Mixer Gain Configuration 00: +0dB 10: -9.5dB 01: -6dB 11: -12dB — — — — — — Maxim Integrated │ 135 ...
Page 136
... MIXHPRG[1:0] HPVOLL[4:0] HPLM HPLEN HP -67dB TO 3dB HEADPHONE LEFT LEFT PGA MUX ZDEN VS2EN ZSEN HP -67dB TO 3dB HEADPHONE RIGHT PGA MUX HPVOLR[4:0] HEADPHONE HPRM DIRECT DRIVE HPREN CHARGE PUMP C1P C1N CPVDD CPVSS Maxim Integrated │ 136 HPL HPSNS HPR HPVDD HPGND ...
Page 137
... DESCRIPTION — — 0x0F: -17dB 0x07: -40dB 0x0E: -19dB 0x06: -43dB 0x0D: -22dB 0x06: -47dB 0x0C: -25dB 0x04: -51dB 0x0B: -28dB 0x03: -55dB 0x0A: -31dB 0x02: -59dB 0x09: -34dB 0x01: -63dB 0x08: -37dB 0x00: -67dB Maxim Integrated │ 137 sec- ...
Page 138
... In this configuration, channel isolation can be degraded, resulting in increased channel-to-channel crosstalk. ISOLATED HP SENSE TRACE HEADPHONE CODEC GROUND PLANE HEADPHONE HEADPHONE OUTPUT JACK ALTERNATIVE GROUND SENSE CONFIGURATION HP SENSE TO GROUND HPL LEFT PGA HPSNS CODEC GROUND PLANE HPR HEADPHONE RIGHT PGA OUTPUT JACK Maxim Integrated │ 138 ...
Page 139
... CHARGE PUMP CONFIGURATION FREQUENCY ) (kHz) ~82 ~660 ~500 +V HPVDD V HP_OUT GND -V HPVDD /2 while the high power HPVDD . The switching fre- HPVDD V WAVEFORM CPVDD/CPVSS ±V /2 Range 1 HPVDD ±V /2 Range 2 HPVDD ±V Range 3 HPVDD V HP_OUT DIRECTDRIVE HEADPHONE BIAS Maxim Integrated │ 139 ...
Page 140
... HPVDD ≤ When the HPVDD HP_OUT ). The switching frequency in this range is OPERATING RANGE 3 25% V ≤ V HPVDD HP_OUT POSITIVE TERMINAL (C1P) V HPVDD V HPVDD 2 GND -V HPVDD 2 -V HPVDD NEGATIVE TERMINAL (C1N) V HPVDD V HPVDD 2 GND -V HPVDD 2 -V HPVDD Maxim Integrated │ 140 /2 HPVDD ...
Page 141
... If no zero crossing occurs within the timeout window (100ms), the volume change occurs regardless of signal level. 32ms 2 GND HPVDD 2 32ms GND V CPVDD V HP_OUT V CPVSS I C PGA 2 VOLUME CHANGE AUDIO OUTPUT VOLUME CHANGE ZERO-CROSSING DETECTION DISABLED (ZDEN = 0) Maxim Integrated │ 141 ...
Page 142
... Each step in the volume ramp then occurs either after a zero crossing has occurred in the audio signal or after the timeout window has expired. During turn-off, enhance volume smoothing is always disabled. — — — — — Maxim Integrated │ 142 ...
Page 143
... MICBIAS 1µF V IN+ ANALOG MIC INPUT 1µF V IN- V JACKSNS SPKLVDD V MICBIAS HPL MBEN RIGHT LEFT HPR V SPKLVDD HPSNS V MICBIAS V SPKLVDD INTERNAL JDETEN PULL-UP JDWK CONTROL LOAD SENSE COMPARATOR LSNS V TH 95% JDETEN JDEB[1:0] JKSNS V TH 10% JACK SENSE COMPARATOR Maxim Integrated │ 143 ...
Page 144
... The debounce timeout can be programmed to one of four set- tings from 25ms to 200ms (Table 77). STATE No jack detected Headset detected Headphones detected Not possible/reserved is JACKSNS Maxim Integrated │ 144 ...
Page 145
... SHDN = 1 IN+ HEADSET ANALOG JACK MIC INPUT 1µF V IN- JACKSNS BIAS CURRENT HPL COMPARATORS MIC GND RIGHT LEFT HPR HPSNS LSNS = 0 JDWK = 0 JDWK = 1 JKSNS = 1 Maxim Integrated │ 145 SPKLVDD PULLUP JACK DETECT ENABLED LSNS = 1 JKSNS = 1 SPKLVDD PULLUP JACK DETECT ENABLED LSNS = 0 JKSNS = 0 ...
Page 146
... JACKSNS to ground, well below both the load and jack sense comparator thresholds. In case 4, a headset jack is inserted and the external pullup biases the headset MIC (and JACKSNS level between the load sense and jack sense comparator thresholds. Maxim Integrated │ 146 ...
Page 147
... JACK DETECT COMPARATORS HPR HPSNS BIAS CURRENT MICBIAS 2.2kΩ 1µF V IN+ ANALOG JACK MIC INPUT 1µF V IN- JACKSNS HI-Z HPL JACK DETECT COMPARATORS MIC GND RIGHT LEFT HPR HPSNS Maxim Integrated │ 147 SPKLVDD INTERNAL PULLUP DISABLED ENABLED SPKLVDD INTERNAL PULLUP DISABLED ENABLED ...
Page 148
... SCHOTTKY DIODE BLOCKS BIAS CURRENT PATH TO INTERNAL ANALOG MICROPHONE 1µF V IN+ ANALOG MIC INPUT 2 1µF V IN- 2.2kΩ MICBIAS HI-Z 2.2kΩ 1µF V IN+ ANALOG MIC INPUT 1 1µF V IN- JACKSNS CURRENT PATH BLOCKED HPL HPR HPSNS Maxim Integrated │ 148 SPKLVDD PULLUP JACK DETECT COMPARATORS ENABLED ...
Page 149
... MBEN and SHDN so that: SUPPLY MBEN = 0 or SHDN = SUPPLY SPKLVDD MBEN = 1 and SHDN = SUPPLY — — — — — — — — — (internal pullup) SPKLVDD (external pullup) MICBIAS (internal pullup) (external pullup) MICBIAS — Maxim Integrated │ 149 ...
Page 150
... S master mode operation. Sets up DAI for slave mode operation. DESCRIPTION Sets up the DAC to headphone path. Sets up the DAC to receiver path. Sets up the DAC to speaker path Sets up the DAC to line out path. — — — — — — Maxim Integrated │ 150 ...
Page 151
... Sets up stereo single-ended record: IN3/IN4 to line in A/B to ADCL/R Sets up stereo single-ended record: IN5/IN6 to line in A/B to ADCL/R (WLP only) Sets up mono differential record: IN3/IN4 to line ADCL Sets up mono differential record: IN6/IN5 to line ADCR (WLP only) — — — — Maxim Integrated │ 151 ...
Page 152
... Sets up the IN3/IN4 single ended to line in A/B to headphone L/R path Sets up the IN6/IN5 differential to line speaker right path (WLP only) Sets up the IN6/IN5 differential to line receiver path (WLP only) Sets up the IN3/IN4 single ended to line in A/B to lineout L/R path Maxim Integrated │ 152 ...
Page 153
... This allows JDET to generate wake on insert interrupts. DRC Compression Flag 0: The DRC is either disabled or not in the compression region. 1: The DRC is operating in the compression region. DRC Clipping Flag 0: The DRC is either disabled or no clipping has occurred. 1: DRC clipping has occurred. — — Maxim Integrated │ 153 ...
Page 154
... DRC compression triggers IRQ and sets DRCACT (0x01[1]). DRC Clipping Interrupt Enable 0: DRC clipping only sets DRCCLP (0x01[0]). 1: DRC clipping triggers IRQ and sets DRCCLP (0x01[0]). DESCRIPTION Read Back the Revision ID of the Device The current revision ID is 0x43. — — Maxim Integrated │ 154 ...
Page 155
... MAX98090B for WRITE ADDRESS read mode. Setting the read/write bit to 0 (slave address 0x20 = 0x22) configures the MAX98090B for write mode. The 0x22 slave address are summarized in Table 88 section. START and STOP Conditions P Maxim Integrated │ 155 ...
Page 156
... REGISTER ADDRESS A DATA BYTE 1 1 BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER 9 ACKNOWLEDGE FROM MAX98090 DATA BYTE 1 BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER ACKNOWLEDGE FROM MAX98090 DATA BYTE n 1 BYTE Maxim Integrated │ 156 ...
Page 157
... REGISTER ADDRESS A Sr SLAVE ADDRESS REPEATED START ACKNOWLEDGE FROM MAX98090 A SLAVE ADDRESS Sr REPEATED START NOT ACKNOWLEDGE FROM MASTER 1 A DATA BYTE A R/W 1 BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER 1 A DATA BYTE 1 BYTE R/W AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER Maxim Integrated │ 157 P A ...
Page 158
... RCVP/LOUTL 32Ω RCVN/LOUTN SPKLP 4/8Ω SPKLN SPKRP 4/8Ω SPKRN HPL HEADPHONE HPR OUTPUT JACK HPSNS JACKSNS 2.2kΩ MICBIAS 1µF MICBIAS CPVSS C1N C1P 1µF 1 µ F Maxim Integrated │ 158 RECEIVER/ LINE OUTPUT (RECEIVER BTL MODE) LEFT SPEAKER OUTPUT RIGHT SPEAKER OUTPUT ...
Page 159
... RECEIVER/ RCVP/LOUTL LINE OUTPUT 1µF (SINGLE-ENDED RCVN/LOUTN LINE OUT MODE) LEFT SPKLP 4/8Ω SPEAKER SPKLN OUTPUT RIGHT SPKRP 4/8Ω SPEAKER SPKRN OUTPUT HPL HEADPHONE HPR OUTPUT JACK HPSNS JACKSNS 2.2kΩ MICBIAS 1µF MICBIAS C1N C1P 1µF 1 µ F Maxim Integrated │ 159 ...
Page 160
... REGISTER 0x04, 0x05, 0x1B to 0x20 0x3E, 0x3F 0x42 to 0x44 0x46 to 0xBD Maxim Integrated │ 160 ...
Page 161
... Although this movement is small, a speaker not designed to handle the additional power can be damaged. For optimum results, use a speaker with a series inductance > 10µH. Typical 8Ω speakers exhibit series inductances in the 20µH to 100µH range. Typical Operating Characteristics Maxim Integrated │ 161 ...
Page 162
... Avoid using micro vias to connect to the ground plane as these vias do not conduct well at RF frequencies. At the Headphone outputs, additional RFI can be achieved by using ferrite beads with the capacitors to ground (Figure 56). Maxim Integrated │ 162 ...
Page 163
... The IC uses a 49-bump WLP package. Figure 57 pro- vides an example of how to connect to all active bumps using 3 layers of the PCB. To ensure uninter rupted ground returns, use layer connecting or dog-bone layer between layer 1 and layer 3, and flood the remaining area with a copper ground plane. LAYER 3 Maxim Integrated │ 163 ...
Page 164
... CONNECTION ANALOG AUDIO OUTPUTS Unconnected Unconnected AGND Unconnected Unconnected Unconnected Unconnected Unconnected Unconnected DIGITAL AUDIO INTERFACE DGND Unconnected Always connect DGND DGND INTERFACE Always connect Always connect IRQ Unconnected OTHER Unconnected Unconnected Always connect Always connect Maxim Integrated │ 164 ...
Page 165
... MAX98090 Ordering Information PART MAX98090AEWJ+T MAX98090AETL+T MAX98090BEWJ+T MAX98090BETL+T +Denotes a lead(Pb)-free/RoHS-compliant package Tape and reel. Chip Information PROCESS: CMOS www.maximintegrated.com Ultra-Low Power Stereo Audio Codec ADDRESS TEMP RANGE 0x20 -40°C to +85 0x20 -40°C to +85°C 0x22 -40°C to +85°C 0x22 -40°C to +85°C ...
Page 166
... The parametric values (min and max limits) shown in the Electrical Character- istics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc. Ultra-Low Power Stereo Audio Codec DESCRIPTION © ...