AT25DQ321-SH-B Adesto Technologies, AT25DQ321-SH-B Datasheet - Page 27

• Manufacturer Part Number: AT25DQ321-SH-B
• Description: Flash 32M 2.7-3.6V, 100Mhz Serial Flash
• Manufacturer: Adesto Technologies

Specifications of AT25DQ321-SH-B

• Rohs: yes
• Data Bus Width: 8 bit
• Memory Type: Flash
• Memory Size: 32 Mbit
• Architecture: Flexible, Uniform Erase
• Timing Type: Synchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 19 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Factory Pack Quantity: 95

9.4
Unprotect Sector
Issuing the Unprotect Sector command to a particular sector address will reset the corresponding Sector Protection
Register to the Logical 0 state (see
Table 9-1
for Sector Protection Register values). Every physical sector of the device
has a corresponding single-bit Sector Protection Register that is used to control the software protection of a sector.
Before the Unprotect Sector command can be issued, the Write Enable command must have been previously issued to
set the WEL bit in the Status Register to a Logical 1. To issue the Unprotect Sector command, the CS pin must first be
asserted and the opcode of 39h must be clocked into the device. After the opcode has been clocked in, the three address
bytes designating any address within the sector to be unprotected must be clocked in. Any additional data clocked into
the device after the address bytes will be ignored. When the CS pin is deasserted, the Sector Protection Register
corresponding to the sector addressed by A23-A0 will be reset to the Logical 0 state and the sector itself will be
unprotected. In addition, the WEL bit in the Status Register will be reset back to the Logical 0 state.
The complete three address bytes must be clocked into the device before the CS pin is deasserted and the CS pin must
be deasserted on a byte boundary (multiples of eight bits); otherwise, the device will abort the operation, the state of the
Sector Protection Register will be unchanged and the WEL bit in the Status Register will be reset to a Logical 0.
As a safeguard against accidental or erroneous locking or unlocking of sectors, the Sector Protection Registers can
themselves be locked from updates by using the SPRL (Sector Protection Registers Locked) bit of the Status Register
(please refer to the Status Register description for more details). If the Sector Protection Registers are locked, then any
attempts to issue the Unprotect Sector command will be ignored and the device will reset the WEL bit in the Status
Register back to a Logical 0 and return to the idle state once the CS pin has been deasserted.
Figure 9-4. Unprotect Sector
CS
0
1
2
3
4
5
6
7
8
9
10 11
12
26
27 28
29 30
31
SCK
Opcode
Address Bits A23-A0
SI
0
0
1
1
1
0
0
1
A
A
A
A
A
A
A
A
A
A
A
A
High-impedance
SO
AT25DQ321 [DATASHEET]
27
8718D–DFLASH–12/2012