XRT91L30ES Exar, XRT91L30ES Datasheet - Page 3

• Manufacturer Part Number: XRT91L30ES
• Description: Bus Transceivers
• Manufacturer: Exar

Specifications of XRT91L30ES

• Product Category: Bus Transceivers
• Rohs: yes

REV. 1.0.2
T
GENERAL DESCRIPTION................................................................................................. 1
PIN DESCRIPTIONS .......................................................................................................... 4
1.0 FUNCTIONAL DESCRIPTION ............................................................................................................. 12
2.0 RECEIVE SECTION ............................................................................................................................. 13
3.0 TRANSMIT SECTION .......................................................................................................................... 21
ABLE OF
APPLICATIONS........................................................................................................................................... 1
FEATURES
H
T
R
P
..................................................................................................................................................................... 4
RANSMITTER
OWER AND
NOTES:..................................................................................................................................................... II
ORDERING INFORMATION .................................................................................................................... 3
ARDWARE
ECEIVER
1.1 STS-12/STM-4 AND STS-3/STM-1 MODE OF OPERATION ......................................................................... 12
1.2 CLOCK INPUT REFERENCE FOR CLOCK MULTIPLIER (SYNTHESIZER) UNIT ...................................... 12
1.3 DATA LATENCY ............................................................................................................................................. 12
2.1 RECEIVE SERIAL INPUT ............................................................................................................................... 13
2.2 RECIEVE SERIAL DATA INPUT TIMING ...................................................................................................... 14
2.3 RECEIVE CLOCK AND DATA RECOVERY .................................................................................................. 15
2.4 EXTERNAL RECEIVE LOOP FILTER CAPACITORS ................................................................................... 16
2.5 LOSS OF SIGNAL .......................................................................................................................................... 16
2.6 SONET FRAME BOUNDARY DETECTION AND BYTE ALIGNMENT RECOVERY .................................... 17
2.7 RECEIVE SERIAL INPUT TO PARALLEL OUTPUT (SIPO) ......................................................................... 17
2.8 RECEIVE PARALLEL OUTPUT INTERFACE ............................................................................................... 18
2.9 DISABLE PARALLEL RECEIVE DATA OUTPUT UPON LOS ..................................................................... 18
2.10 RECEIVE PARALLEL DATA OUTPUT TIMING .......................................................................................... 19
3.1 TRANSMIT PARALLEL INPUT INTERFACE ................................................................................................ 21
3.2 TRANSMIT PARALLEL DATA INPUT TIMING ............................................................................................. 22
3.3 ALTERNATE TRANSMIT PARALLEL BUS CLOCK INPUT OPTION .......................................................... 23
3.4 ALTERNATE TRANSMIT PARALLEL DATA INPUT TIMING ....................................................................... 23
F
F
T
T
T
F
F
T
T
T
T
F
F
F
F
F
F
T
T
T
F
F
T
T
F
IGURE
IGURE
ABLE
ABLE
ABLE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
IGURE
IGURE
ABLE
ABLE
IGURE
2.3.1 INTERNAL CLOCK AND DATA RECOVERY BYPASS ............................................................................................ 16
1: ........................................................................................................................................................................................ 4
2: CMU R
3: D
4: R
5: R
6: C
7: C
8: R
9: R
10: PECL
11: T
12: T
1. B
2. 64 QFP P
3. R
4. R
5. I
6. E
7. LOS D
8. S
9. R
10. R
11. T
12. T
13. A
C
..................................................................................................................................................... 2
S
ONTENTS
C
ECTION
G
ATA INGRESS TO DATA EGRESS LATENCY
ECEIVE
ECEIVE
LOCK
LOCK AND
NTERNAL
ECEIVE
ECEIVE
LOCK
ONTROL
XTERNAL
IMPLIFIED
ECEIVE
ECEIVE
ECEIVE
RANSMIT
RANSMIT
S
ROUND
RANSMIT
RANSMIT
ECEIVE
LTERNATE
ECTION
D
EFERENCE
AND
ECLARATION CIRCUIT
D
H
H
ATA
P
P
IAGRAM OF
....................................................................................................................................... 9
S
H
P
ARALLEL
ARALLEL
IGH
IGH
C
IN
P
ERIAL
ARALLEL
P
P
IGH
D
L
B
.................................................................................................................................... 4
.................................................................................................................................. 10
TTL R
LOCK AND
P
P
OOP
ARALLEL
ARALLEL
ARALLEL
R
ATA
O
LOCK
-
-S
.................................................................................................................................. 7
T
ARALLEL
ARALLEL
SPEED
............................................................................................................
ECOVERY UNIT REFERENCE CLOCK SETTINGS
-S
UT OF THE
RANSMIT
PEED
PEED
I
R
F
F
NPUT
ECEIVE
ILTERS
ECOVERY
D
D
D
REQUENCY
O
ATA
ATA
XRT91L30 ...................................................................................................................................... 1
IAGRAM OF
S
O
D
D
S
UTPUT
D
S
I
I
ERIAL
ERIAL
UTPUT
NPUT
NPUT
ATA
ATA
I
ATA
NTERFACE
ERIAL
P
O
O
XRT91L30 (T
.............................................................................................................................................. 16
ARALLEL
O
UTPUT
UTPUT
I
I
........................................................................................................................................... 17
UTPUTS
NPUT
NPUT
R
D
U
I
I
T
D
NTERFACE
NTERFACE
ECOVERY
T
D
O
NIT
IMING
ATA
TABLE OF CONTENTS
ATA
IMING
ATA
SIPO ........................................................................................................................... 18
PTIONS
T
T
T
T
P
I
I
B
IMING
IMING
I
IMING
IMING
NPUT
NPUT
ERFORMANCE
NPUT
T
.............................................................................................................................. 22
I
LOCK
NPUT
IMING
............................................................................................................................ 19
OP
(D
B
B
B
....................................................................................................................... 12
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
I
(STS-12/STM-4 O
(STS-3/STM-1 O
T
(STS-12/STM-4 O
(STS-3/STM-1 O
T
YPASS
LOCK
NTERFACE
..................................................................................................................... 13
LOCK
IFFERENTIAL OR
T
IMING
IMING
V
S
IMING
IEW
PECIFICATION
............................................................................................................. 18
............................................................................................................. 21
............................................................................................................ 16
)............................................................................................................ 3
(STS-12/STM-4 O
(STS-3/STM-1 O
.......................................................................................................... 15
D
IAGRAM
B
I
LOCK
............................................................................................ 15
............................................................................................ 20
S
PERATION
PERATION
.......................................................................................... 14
(P
INGLE
PERATION
PERATION
ARALLEL
-E
PERATION
PERATION
NDED
) ........................................................................... 19
)........................................................................... 22
) ......................................................................... 19
)......................................................................... 22
C
LOCK
) ................................................................... 12
)............................................................... 14
) ............................................................. 14
I
NPUT
O
PTION
) ...................................... 23
XRT91L30
I