XRT91L30ES Exar, XRT91L30ES Datasheet - Page 22

• Manufacturer Part Number: XRT91L30ES
• Description: Bus Transceivers
• Manufacturer: Exar

Specifications of XRT91L30ES

• Product Category: Bus Transceivers
• Rohs: yes

XRT91L30
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
bit de-interleaves the serial data input into an 8-bit parallel output to RXDO[7:0]. A simplified block diagram is
shown in
F
The 8-bit Single-Ended LVTTL running at 77.76 Mbps (STS-12/STM-4) or 19.44 Mbps (STS-3/STM-1) parallel
data output of the receive path is used to interface to a SONET Framer/ASIC synchronized to the recovered
clock. A simplified block diagram is shown in
F
The parallel receiver outputs are automatically pulled "Low" or forced to a logic state of "0" during a LOS
condition to prevent data chattering unless LOS detection is disabled by asserting DLOSDIS and keeping
LOSEXT input pin "high." In addition, the user can also assert LOSEXT input pin "low" from the optical
module to force an LOS and mute the parallel receiver outputs as well (while DLOSDIS input is also low, see
Figure
2.8
2.9
IGURE
IGURE
7).
8. S
RXPCLKO
9. R
Receive Parallel Output Interface
Disable Parallel Receive Data Output Upon LOS
RXDO n+
RXDO7
RXDO0
RXDO n
Figure
IMPLIFIED
ECEIVE
8-bit Parallel LVTTL Output Data
8. XRT91L30 clocks data out on RXDO[7:0] at the falling edge of RXPCLKO.
P
ARALLEL
B
LOCK
b
b
b
b
n+
0
n
7
3
3
3
3
b
D
b
b
b
n+
0
n
7
O
2
2
2
IAGRAM OF
2
b
b
b
b
UTPUT
SONET Framer/ASIC
n+
0
n
7
1
1
1
1
b
b
b
b
n+
0
n
7
0
0
0
0
77.76 MHz (STS-12/STM-4) or 19.44 MHz (STS-3/STM-1)
I
NTERFACE
SIPO
Figure
B
LOCK
8
9.
b
7
18
3
b
RXDO[7:0]
RXPCLKO
6
3
b
5
3
b
4
3
155.52 Mbps STS-3/STM-1 serial data rate
b
3
3 b
STS-12/STM-4
STS-3/STM-1
622.08 Mbps STS-12/STM-4 or
Transceiver
XRT91L30
2
3 b
or
1
3
b
7
0 b
6
0 b
5
0 b
4
0
b
3
0 b
2
0 b
1
0 b
0
0
RXIP/N
REV. 1.0.2