XRT91L30ES Exar, XRT91L30ES Datasheet - Page 23

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XRT91L30ES

Manufacturer Part Number
XRT91L30ES
Description
Bus Transceivers
Manufacturer
Exar
Datasheet

Specifications of XRT91L30ES

Product Category
Bus Transceivers
Rohs
yes
REV. 1.0.2
The receive parallel data output from the STS-12/STM-4 or STS-3/STM-1 receiver will adhere to the setup and
hold times shown in
specifications.
F
2.10
IGURE
t
t
t
t
RXDO_VALID
RXDO_VALID
PULSE_WID
PULSE_WID
t
t
S
RXPCLKO
S
RXPCLKO
t
t
10. R
RXCLK
RXCLK
YMBOL
YMBOL
Receive Parallel Data Output Timing
FRAMEPULSE
ECEIVE
RXPCLKO
RXDO[7:0]
T
T
ABLE
RXIP
RXIN
ABLE
P
Receive high-speed serial clock period
Receive parallel data output byte clock period
Time the data is valid on RXDO[7:0] and FRAMEPULSE
before and after the rising edge of RXPCLKO
Pulse width of frame detection pulse on FRAMEPULSE
Receive high-speed serial clock period
Receive parallel data output byte clock period
Time the data is valid on RXDO[7:0] and FRAMEPULSE
before and after the rising edge of RXPCLKO
Pulse width of frame detection pulse on FRAMEPULSE
Figure 10 ,Table
8: R
ARALLEL
9: R
A1
ECEIVE
ECEIVE
O
UTPUT
P
P
ARALLEL
ARALLEL
t
RXCLK
T
8, and
A2
IMING
P
P
D
ARAMETER
ARAMETER
t
D
RXPCLKO
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
ATA
ATA
Table
O
O
UTPUT
UTPUT
19
A2
9.
Table 10
T
T
IMING
IMING
t
t
RXDO_VALID
(STS-12/STM-4 O
PULSE_WID
(STS-3/STM-1 O
shows the PECL and TTL output timing
A2
M
M
22
4
IN
IN
A2
PERATION
PERATION
1.608
12.86
12.86
51.44
51.44
6.43
T
T
YP
YP
)
)
M
M
XRT91L30
AX
AX
U
U
NITS
ns
ns
ns
ns
NITS
ns
ns
ns
ns

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