XRT91L30ES Exar, XRT91L30ES Datasheet - Page 17

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XRT91L30ES

Manufacturer Part Number
XRT91L30ES
Description
Bus Transceivers
Manufacturer
Exar
Datasheet

Specifications of XRT91L30ES

Product Category
Bus Transceivers
Rohs
yes
REV. 1.0.2
The receive section of XRT91L30 include the inputs RXIP/N, followed by the clock and data recovery unit
(CDR) and receive serial-to-parallel converter. The receiver accepts the high speed Non-Return to Zero (NRZ)
serial data at 622.08 Mbps or 155.52 Mbps through the input interfaces RXIP/N. The clock and data recovery
unit recovers the high-speed receive clock from the incoming scrambled NRZ data stream. The recovered
serial data is converted into an 8-bit-wide, 77.76 Mbps or 19.44 Mbps parallel data and presented to the
RXDO[7:0] parallel interface. This parallel interface is designed for Single-Ended LVTTL operation. A divide-
by-8 version of the high-speed recovered clock RXPCLKOP/N, is used to synchronize the transfer of the 8-bit
RXDO[7:0] data with the receive portion of the framer/mapper device. Upon initialization or loss of signal or
loss of lock, the external reference clock signal of 19.44 MHz or 77.76 MHz is used to start-up the clock
recovery phase-locked loop for proper operation. In certain applications, the CDR block on the XRT91L30 can
be disabled and bypassed by enabling the CDRDIS pin to permit the flexibility of using an externally recovered
receive clock thru the XRXCLKIP/N pins.
The receive serial inputs are applied to RXIP/N. The receive serial inputs can be AC or DC coupled to an
optical module or an electrical interface. A simplified AC coupled block diagram is shown in
F
also to Application Note TAN-9130 for other line interface options)
N
2.0 RECEIVE SECTION
2.1
IGURE
OTE
: Some optical modules integrate AC coupling capacitors within the module. AC or DC coupling is largely specific to
system design and optical module of choice.
3. R
Receive Serial Input
ECEIVE
STS-12/STM-4
STS-3/STM-1
Transceiver
XRT91L30
S
XRXCLKIN
XRXCLKIP
or
ERIAL
RXIP
RXIN
I
NPUT
(optional)
I
NTERFACE
130R
82R
Install terminators close to
RXIP and RXIN pins
1k
B
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
LOCK
1k
Tie unused differential input pins
13
AC coupled
Internally
to VCC and GND
SFP, Optical Module
Optical Fiber
Figure
XRT91L30
3. (Refer

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