LPC1317FHN33,551 NXP Semiconductors, LPC1317FHN33,551 Datasheet - Page 26

• Manufacturer Part Number: LPC1317FHN33,551
• Description: ARM Microcontrollers - MCU 32bit ARM Cortex-M3 64KB Flash 10KB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1317FHN33,551

• Rohs: yes
• Core: ARM Cortex M3
• Processor Series: LPC1317
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 72 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
LPC1315_16_17_45_46_47
Product data sheet
7.6.2 Interrupt sources
7.7.1 Features
7.7 IOCON block
7.8 General Purpose Input/Output GPIO
Each peripheral device has one interrupt line connected to the NVIC but may have several
interrupt flags. Individual interrupt flags may also represent more than one interrupt
source.
The IOCON block allows selected pins of the microcontroller to have more than one
function. Configuration registers control the multiplexers to allow connection between the
pin and the on-chip peripherals.
Peripherals should be connected to the appropriate pins prior to being activated and prior
to any related interrupt(s) being enabled. Activity of any enabled peripheral function that is
not mapped to a related pin should be considered undefined.
Device pins that are not connected to a specific peripheral function are controlled by the
GPIO registers. Pins may be dynamically configured as inputs or outputs. Multiple outputs
can be set or cleared in one write operation.
LPC1315/16/17/45/46/47 use accelerated GPIO functions:
Any GPIO pin providing a digital function can be programmed to generate an interrupt on
a level, a rising or falling edge, or both.
The GPIO block consists of three parts:
1. The GPIO ports.
2. The GPIO pin interrupt block to control eight GPIO pins selected as pin interrupts.
3. Two GPIO group interrupt blocks to control two combined interrupts from all GPIO
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Software interrupt generation.
Programmable pull-up, pull-down, or repeater mode.
All GPIO pins (except PIO0_4 and PIO0_5) are pulled up to 3.3 V (V
pull-up resistor is enabled.
Programmable pseudo open-drain mode.
Programmable 10-ns glitch filter on pins PIO0_22, PIO0_23, and PIO0_11 to
PIO0_16. The glitch filter is turned off by default.
Programmable hysteresis.
Programmable input inverter.
GPIO registers are a dedicated AHB peripheral so that the fastest possible I/O timing
can be achieved.
Entire port value can be written in one instruction.
pins.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 September 2012
LPC1315/16/17/45/46/47
32-bit ARM Cortex-M3 microcontroller
© NXP B.V. 2012. All rights reserved.
DD
= 3.3 V) if their
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