LPC1317FHN33,551 NXP Semiconductors, LPC1317FHN33,551 Datasheet - Page 18

• Manufacturer Part Number: LPC1317FHN33,551
• Description: ARM Microcontrollers - MCU 32bit ARM Cortex-M3 64KB Flash 10KB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1317FHN33,551

• Rohs: yes
• Core: ARM Cortex M3
• Processor Series: LPC1317
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 72 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
Table 4.
LPC1315_16_17_45_46_47
Product data sheet
Symbol
RESET/PIO0_0
PIO0_1/CLKOUT/
CT32B0_MAT2/
USB_FTOGGLE
PIO0_2/SSEL0/
CT16B0_CAP0
PIO0_3/USB_VBUS
PIO0_4/SCL
PIO0_5/SDA
PIO0_6/USB_CONNECT/
SCK0
PIO0_7/CTS
PIO0_8/MISO0/
CT16B0_MAT0
Pin description (LPC1345/46/47 - with USB)
4
5
13
19
20
21
29
30
36
3
4
10
14
15
16
22
23
27
2
3
8
9
10
11
15
16
17
All information provided in this document is subject to legal disclaimers.
[2]
[3]
[3]
[3]
[4]
[4]
[3]
[5]
[3]
Rev. 3 — 20 September 2012
I; PU I
-
I; PU I/O
-
-
-
I; PU I/O
I; PU I/O
-
IA
-
IA
-
I; PU I/O
-
-
I; PU I/O
-
I; PU I/O
-
-
I/O
O
O
O
I/O
I
I
I/O
I/O
I/O
I/O
O
I/O
I
I/O
O
Description
RESET — External reset input with 20 ns glitch filter. A
LOW-going pulse as short as 50 ns on this pin resets the
device, causing I/O ports and peripherals to take on their
default states, and processor execution to begin at
address 0. This pin also serves as the debug select input.
LOW level selects the JTAG boundary scan. HIGH level
selects the ARM SWD debug mode.
PIO0_0 — General purpose digital input/output pin.
PIO0_1 — General purpose digital input/output pin. A
LOW level on this pin during reset starts the ISP
command handler or the USB device enumeration.
CLKOUT — Clockout pin.
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
USB_FTOGGLE — USB 1 ms Start-of-Frame signal.
PIO0_2 — General purpose digital input/output pin.
SSEL0 — Slave select for SSP0.
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_3 — General purpose digital input/output pin. A
LOW level on this pin during reset starts the ISP
command handler. A HIGH level during reset starts the
USB device enumeration.
USB_VBUS — Monitors the presence of USB bus power.
PIO0_4 — General purpose digital input/output pin
(open-drain).
SCL — I
High-current sink only if I
the I/O configuration register.
PIO0_5 — General purpose digital input/output pin
(open-drain).
SDA — I
High-current sink only if I
the I/O configuration register.
PIO0_6 — General purpose digital input/output pin.
USB_CONNECT — Signal used to switch an external
1.5 k resistor under software control. Used with the
SoftConnect USB feature.
SCK0 — Serial clock for SSP0.
PIO0_7 — General purpose digital input/output pin
(high-current output driver).
CTS — Clear To Send input for USART.
PIO0_8 — General purpose digital input/output pin.
MISO0 — Master In Slave Out for SSP0.
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
LPC1315/16/17/45/46/47
2
2
C-bus clock input/output (open-drain).
C-bus data input/output (open-drain).
32-bit ARM Cortex-M3 microcontroller
2
2
C Fast-mode Plus is selected in
C Fast-mode Plus is selected in
© NXP B.V. 2012. All rights reserved.
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