DM9010BI DAVICOM [Davicom Semiconductor, Inc.], DM9010BI Datasheet - Page 32

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DM9010BI

Manufacturer Part Number
DM9010BI
Description
Industrial-temperature 10/100 Mbps Single Chip Ethernet Controller With General Processor Interface
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet
8.2 Basic Mode Status Register (BMSR) - 01
Preliminary
Version: DM9010BI--DS-P01
January 12, 2010
1.10-1.7
0.6-0.0
1.15
1.14
1.13
1.12
1.11
1.6
1.5
1.4
1.3
1.2
Bit
Auto-negotiation
Auto-negotiation
100BASE-TX
100BASE-TX
MF preamble
100BASE-T4
Remote fault
suppression
half-duplex
half-duplex
10BASE-T
10BASE-T
Link status
full-duplex
full-duplex
Reserved
Bit Name
Reserved
Complete
ability
0, RO/LH
0,RO/LL
Default
0,RO/P
1,RO/P
1,RO/P
1,RO/P
1,RO/P
1,RO/P
0,RO
0,RO
1,RO
0,RO
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
internal MII interface.
0 = Normal operation
Reserved
Read as 0, ignore on write
100BASE-T4 Capable
1 = DM9010BI is able to perform in 100BASE-T4 mode
0 = DM9010BI is not able to perform in 100BASE-T4 mode
100BASE-TX Full Duplex Capable
1 = DM9010BI is able to perform 100BASE-TX in full duplex mode
0 = DM9010BI is not able to perform 100BASE-TX in full duplex
mode
100BASE-TX Half Duplex Capable
1 = DM9010BI is able to perform 100BASE-TX in half duplex mode
0 = DM9010BI is not able to perform 100BASE-TX in half duplex
mode
10BASE-T Full Duplex Capable
1 = DM9010BI is able to perform 10BASE-T in full duplex mode
0 = DM9010BI is not able to perform 10BASE-TX in full duplex mode
10BASE-T Half Duplex Capable
1 = DM9010BI is able to perform 10BASE-T in half duplex mode
0 = DM9010BI is not able to perform 10BASE-T in half duplex mode
Reserved
Read as 0, ignore on write
MII Frame Preamble Suppression
1 = PHY will accept management frames with preamble suppressed
0 = PHY will not accept management frames with preamble
suppressed
Auto-negotiation Complete
1 = Auto-negotiation process completed
0 = Auto-negotiation process not completed
Remote Fault
1 = Remote fault condition detected (cleared on read or by a chip
reset). Fault criteria and detection method is DM9010BI
implementation specific. This bit will set after the RF bit in the
ANLPAR (bit 13, register address 05) is set
0 = No remote fault condition detected
Auto Configuration Ability
1 = DM9010BI is able to perform auto-negotiation
0 = DM9010BI is not able to perform auto-negotiation
Link Status
1 = Valid link is established (for either 10Mbps or 100Mbps
operation)
0 = Link is not established
The link status bit is implemented with a latching function, so that the
occurrence of a link failure condition causes the link status bit to be
cleared and remain cleared until it is read via the management
interface
Description
DM9010BI
32

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