DM9010BI DAVICOM [Davicom Semiconductor, Inc.], DM9010BI Datasheet - Page 2
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DM9010BI
Manufacturer Part Number
DM9010BI
Description
Industrial-temperature 10/100 Mbps Single Chip Ethernet Controller With General Processor Interface
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet
1.DM9010BI.pdf
(60 pages)
1. GENERAL DESCRIPTION .............................................................................................................................................. 5
2. BLOCK DIAGRAM........................................................................................................................................................... 5
3. FEATURES ......................................................................................................................................................................... 6
4. PIN CONFIGURATION.................................................................................................................................................... 7
5. PIN DESCRIPTION........................................................................................................................................................... 9
6. VENDOR CONTROL AND STATUS REGISTER SET............................................................................................... 14
Preliminary
Version: DM9010BI--DS-P01
January 12, 2010
4.1 P
4.2 P
5.1 MII I
5.2 P
5.3 EEPROM I
5.4 C
5.5 LED I
5.6 10/100 PHY/F
5.7 M
5.8 P
5.9
6.1 N
6.2 N
6.3 TX C
6.4 TX S
6.5 TX S
6.6 RX C
6.7 RX S
6.8 R
6.9 B
6.10 F
6.11 RX/TX F
6.12 EEPROM & PHY C
6.13 EEPROM & PHY A
6.14 EEPROM & PHY D
6.15 W
6.16 P
6.17 M
6.18 G
6.19 G
6.20 TX SRAM R
6.21 RX SRAM W
6.22 V
6.23 P
6.24 C
6.25 T
6.26 O
6.27 S
6.28 E
STRAP PINS TABLE
IN
IN
ROCESSOR
OWER
LOCK
ECEIVE
ACK
ETWORK
ETWORK
ISCELLANEOUS
LOW
HYSICAL
RODUCT
PECIAL
RANSMIT
ARLY
HIP
ENERAL PURPOSE CONTROL
ENERAL PURPOSE
ENDOR
PERATION
AKE UP
ULTICAST
C
C
NTERFACE
TATUS
TATUS
TATUS
ONTROL
ONTROL
ONFIGURATION
ONFIGURATION
NTERFACE
P
R
I
C
P
RESSURE
EVISION
NTERFACE
T
INS
O
ONTROL
RANSMIT
M
ID R
LOW
C
S
C
VERFLOW
ID R
NTERFACE
A
R
R
R
I
TATUS
C
ODE
.................................................................................................................................................................. 13
ONTROL
ONTROL
NTERFACE
T
A
EGISTER
EGISTER
DDRESS
EGISTER
ONTROL
R
R
EAD
IBER
EST
DDRESS
RITE
EGISTER
C
............................................................................................................................................................... 9
EGISTER
EGISTER
EGISTER
R
............................................................................................................................................................11
C
T
ONTROL
.......................................................................................................................................................... 12
T
......................................................................................................................................................... 13
EGISTER
HRESHOLD
ONTROL
C
.........................................................................................................................................................11
R
P
HRESHOLD
C
....................................................................................................................................................... 12
P
OINTER
ONTROL
EGISTER
R
I:
II:
R
ONTROL
C
R
ONTROL
DDRESS
OINTER
ATA
R
....................................................................................................................................................11
I ( 03H )
II ( 04H )
( 06H ) ....................................................................................................................................... 18
EGISTER
R
EGISTER
EGISTER
OUNTER
WITH
EGISTER
R
WITH
.................................................................................................................................................. 9
(28H~29H) ............................................................................................................................. 22
EGISTER
(02H) ..................................................................................................................................... 16
( 05H ) ................................................................................................................................... 17
(2AH~2BH) .......................................................................................................................... 22
EGISTER
R
R
(2CH) ................................................................................................................................ 22
R
EGISTER
EGISTER
A
MII I
EGISTER
R
A
/S
(01H).............................................................................................................................. 16
32-B
R
R
DDRESS
R
R
R
EGISTER
FOR PACKET INDEX
(1FH) .......................................................................................................................... 21
DDRESS
EGISTER
TATUS
(00H) .......................................................................................................................... 16
R
EGISTER
(0FH).......................................................................................................................... 20
EGISTER
FOR PACKET INDEX
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
(10H~15H) ................................................................................................................ 21
EGISTER
EGISTER
2 (2DH) .................................................................................................................... 22
EGISTER
(16H~1DH)............................................................................................................. 21
NTERFACE
IT
(EE_PHY_L:0DH
(0AH).................................................................................................................. 19
D
(2FH) ................................................................................................................ 23
R
R
ATA
R
(2EH) ............................................................................................................. 23
EGISTER
EGISTER
(0CH)............................................................................................................ 20
(08H) ............................................................................................................ 19
(0BH) ........................................................................................................... 20
(09H) ........................................................................................................... 19
(1EH)........................................................................................................... 21
EGISTER
( 07H )........................................................................................................ 18
B
US
................................................................................................................. 7
Content
............................................................................................................. 8
(30H) ............................................................................................... 23
(22H~23H) ...................................................................................... 22
(24H~25H) .................................................................................... 22
I..................................................................................................... 17
I I ................................................................................................. 17
EE_PHY_H:0EH) ....................................................... 20
DM9010BI
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