DM9010BI DAVICOM [Davicom Semiconductor, Inc.], DM9010BI Datasheet - Page 28
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DM9010BI
Manufacturer Part Number
DM9010BI
Description
Industrial-temperature 10/100 Mbps Single Chip Ethernet Controller With General Processor Interface
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet
1.DM9010BI.pdf
(60 pages)
- Current page: 28 of 60
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6.50 Interrupt Status Register (FEH)
6.51 Interrupt Mask Register (FFH)
Preliminary
Version: DM9010BI--DS-P01
January 12, 2010
7:6
Bit
Bit
5
4
3
2
1
0
7
6
5
4
3
2
1
0
RESERVED
LNKCHGI
LNKCHG
IOMODE
UDRUNI
UDRUN
Name
Name
ROOI
ROO
ROS
PAR
ROI
PRI
PTI
PR
PT
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
HPS0,RW
PHS0,RW
PHS0,RW
PHS0,RW
PHS0,RW
PHS0,RW
PHS0,RW
Default
Default
T0, RO
RO
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
Enable the SRAM read/write pointer to automatically return to the start address
when pointer addresses are over the SRAM size. Driver needs to set. When
driver sets this bit, REG_F5 will set to 0Ch automatically
Reserved
Enable Link Status Change Interrupt
Enable Transmit Under run Interrupt
Enable Receive Overflow Counter Overflow Interrupt
Enable Receive Overflow Interrupt
Enable Packet Transmitted Interrupt
Enable Packet Received Interrupt
Bit 7 Bit 6
Link Status Change
Transmit Under run
Receive Overflow Counter Overflow
Receive Overflow
Packet Transmitted
Packet Received
0
0
1
1
0
1
0
1
16-bit mode
32-bit mode
8-bit mode
Reserved
Description
Description
DM9010BI
28
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