DM9010BI DAVICOM [Davicom Semiconductor, Inc.], DM9010BI Datasheet - Page 18
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DM9010BI
Manufacturer Part Number
DM9010BI
Description
Industrial-temperature 10/100 Mbps Single Chip Ethernet Controller With General Processor Interface
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet
1.DM9010BI.pdf
(60 pages)
- Current page: 18 of 60
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6.7 RX Status Register ( 06H )
6.8 Receive Overflow Counter Register ( 07H )
Preliminary
Version: DM9010BI--DS-P01
January 12, 2010
6:0
Bit
Bit
7
7
6
5
4
3
2
1
0
Name
RXFU
RWTO
ROC
Name
FOE
LCS
PLE
MF
CE
RF
AE
PHS0,R/C
PHS0,R/C
PHS0,RO
PHS0,RO
PHS0,RO
PHS0,RO
PHS0,RO
PHS0,RO
PHS0,RO
PHS0,RO
Default
Default
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
Runt Frame
It is set to indicate that the size of the received frame is smaller than 64 bytes
Multicast Frame
It is set to indicate that the received frame has a multicast address
Late Collision Seen
It is set to indicate that a late collision is found during the frame reception
Receive Watchdog Time-Out
It is set to indicate that it receives more than 2048 bytes
Physical Layer Error
It is set to indicate that a physical layer error is found during the frame reception
Alignment Error
It is set to indicate that the received frame ends with a non-byte boundary
CRC Error
It is set to indicate that the received frame ends with a CRC error
FIFO Overflow Error
It is set to indicate that a FIFO overflow error happens during the frame reception
Receive Overflow Counter Overflow
This bit is set when the ROC has an overflow condition
Receive Overflow Counter
This is a statistic counter to indicate the received packet count upon FIFO overflow
Description
Description
DM9010BI
18
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