L-USS820FD-DB AGERE [Agere Systems], L-USS820FD-DB Datasheet - Page 40

• Manufacturer Part Number: L-USS820FD-DB
• Description: USB Device Controller
• Manufacturer: AGERE [Agere Systems]

USS-820FD
USB Device Controller
USB Device Controller
Interrupts
Figure 7 describes the device interrupt logic. Each of the indicated USB events are logged in a status register bit.
Each status bit has a corresponding enable bit that allows the event to cause an interrupt. Interrupts can be
masked globally by the T_IRQ bit of the SCR register. The active level and signaling mode (level vs. pulse) of the
IRQN output pin can be controlled by the IRQPOL and IRQLVL bits of the SCR register. All interrupts have equal
priority—firmware establishes its own priority by the order in which it checks these status bits during interrupt
processing.
40
ENDPOINT 7 TRANSMIT COMPLETE
ENDPOINT 0 TRANSMIT COMPLETE
ENDPOINT 7 RECEIVE COMPLETE
ENDPOINT 0 RECEIVE COMPLETE
PSEUDO START OF FRAME
USB START OF FRAME
USB SUSPEND
USB RESUME
USB RESET
IE_RESUME
IE_RESET
SUSPEND
IE_SUSP
RESUME
SBIE1[7]
SBIE1[6]
RESET
SBIE[1]
SBIE[0]
SOFIE
SBI1[7]
SBI1[6]
ASOF
SBI[1]
SBI[0]
Figure 7. USS-820FD Interrupts
T_IRQ
INTERRUPT
PRESENT
RISING EDGE
GENERATE
DETECT
PULSE
&
IRQLVL
IRQPOL
O
I
Data Sheet, Rev. 1
Agere Systems Inc.
August 2004
IRQN PIN
5-6402