L-USS820FD-DB AGERE [Agere Systems], L-USS820FD-DB Datasheet - Page 38

• Manufacturer Part Number: L-USS820FD-DB
• Description: USB Device Controller
• Manufacturer: AGERE [Agere Systems]

USS-820FD
USB Device Controller
USB Device Controller
Register Interface
Table 37. Miscellaneous Control/Status Register (MCSR)—Address: 1CH; Default:
This register contains miscellaneous control and status bits.
38
RWUPR
Bit
7
6
5
4
3
2
1
0
Bit 7
R
0001 0000B
SUSPLOE
BDFEAT
RWUPR
Symbol
SUSPS
PKGID
DPEN
FEAT
INIT
Bit 6
INIT
R
Remote Wake-Up Remember. This bit is only available if MCSR.FEAT = 1; otherwise, it
always reads 0. Updated by hardware on each wake-up from a suspended state. This bit
is set to 1 if the wake-up was caused by a remote wake-up event (RWUPN pin asserted).
Otherwise, it is reset to 0 (on a global resume or USB reset). If RWUPN is asserted
simultaneously with a global wake-up, the bit is reset to 0 (global wake-up wins). When
set, this bit indicates that resume signaling will be transmitted upstream.
Device Initialized. This bit will read 0 until internal clocks are turned on after a hardware
reset. This bit is not affected by software reset. This bit can be used by firmware to deter-
mine when the device is operational after a hardware reset.
Suspend Status. Indicates the current suspended status of the device. This bit will be
set when the device goes suspended and will remain set until internal clocks are turned
back on at the end of a resume sequence.
Package Identification. Indicates the package type. This bit will read 1 for the 48-ball
TFSBGAC package (USS-820FD). This value is established at the end of a hardware
reset sequence.
Feature Enable. When set, this bit enables various features introduced in revision C of
the USS-820. This bit controls those features which do not impact existing circuit boards
using the USS-820 revision B (i.e., those features not enabled by MCSR.BDFEAT).
These features are explained in detail in the Appendix C of the data sheet. When reset to
0 (along with MCSR.BDFEAT, TXSTAT.TXDSAM and TXSTAT.TXNAKE), the device will
behave like revision B.
Board Feature Enable. When set, this bit enables various features introduced in revi-
sion C of the USS-820. This bit controls those features which could be incompatible with
existing circuit boards using the USS-820 revision B. These features are explained in
detail in Appendix C of the data sheet. When reset to 0 (along with MCSR.FEAT,
TXSTAT.TXDSAM and TXSTAT.TXNAKE), the device will behave like revision B.
Suspend Lock Out Enable. Enables the device locking mechanism, which will then
engage on every device resume. The correct value of this bit must be established before
firmware suspends the device.
DPLS Pull-Up Enable. Controls the DPPU output pin, which may be used to power the
external DPLS pull-up resistor. This can be used by firmware to make the device appear
disconnected from the host without a physical disconnect. When DPEN = 1, the DPPU
output pin is driven high. When DPEN = 0, the DPPU output pin is 3-stated.
(continued)
SUSPS
Bit 5
R
PKGID
Bit 4
R
Function/Description
FEAT
Bit 3
R/W
BDFEAT
Bit 2
R/W
SUSPLOE
Bit 1
R/W
Data Sheet, Rev. 1
Agere Systems Inc.
August 2004
DPEN
Bit 0
R/W