ZL50050GAC ZARLINK [Zarlink Semiconductor Inc], ZL50050GAC Datasheet - Page 33

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ZL50050GAC

Manufacturer Part Number
ZL50050GAC
Description
8 K-Channel Digital Switch with High Jitter Tolerance, Per Stream Rate Conversion (2, 4, 8, 16, or 32 Mbps), and 32 Inputs and 32 Outputs
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
Note 1:
Note 2:
Note 3:
Table 3 - L/BCSTo Allocation of Channel Control Bits to Output Streams (Non-32 Mbps Mode)
Period
Clock period count is referenced to frame boundary.
The channel numbers presented relate to the data rate selected for a specific stream.
3-1 to 3-4: See above for examples of channel control bits for streams of different data rates.
C16o
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
etc.
1
2
3
1
L/BCSTo0
Allocated Stream No.
14
0
2
2
etc.
10
12
14
10
12
4
6
8
0
4
6
8
3-1
3-3
3-3
3-2
L/BCSTo1
15
etc.
13
15
13
11
11
1
3
5
7
9
1
3
5
7
9
3-2
Zarlink Semiconductor Inc.
16 Mbps
Ch 255
Ch 255
Ch 255
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 1
Ch 1
Ch 1
Ch 1
Ch 1
etc.
ZL50050
(continued)
33
8 Mbps
Ch 127
Ch 127
Ch 127
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
etc.
Channel No.
4 Mbps
Ch 63
Ch 63
Ch 63
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
etc.
2
2 Mbps
Ch 31
Ch 31
Ch 31
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
etc.
Boundary
Frame
Data Sheet

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