ZL50050GAC ZARLINK [Zarlink Semiconductor Inc], ZL50050GAC Datasheet - Page 12
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ZL50050GAC
Manufacturer Part Number
ZL50050GAC
Description
8 K-Channel Digital Switch with High Jitter Tolerance, Per Stream Rate Conversion (2, 4, 8, 16, or 32 Mbps), and 32 Inputs and 32 Outputs
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50050GAC.pdf
(94 pages)
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Pin Description (continued)
Backplane and Local Outputs and Control
Pin Name
LSTi8-15
BORS
ODE
N12, N13, M11,
L13, N14, M12,
Coordinates
Package
(196-ball
ZL50050
L12, K12
PBGA)
B9
G2
Local Serial Input Streams 8 to 15 (5 V Tolerant Inputs with Internal
Pull-downs).
In Local Non-32 Mbps Mode, these pins accept serial TDM data streams at a
data rate of:
16.384 Mbps (with 256 channels per stream),
8.192 Mbps (with 128 channels per stream),
4.096 Mbps (with 64 channels per stream) or
2.048 Mbps (with 32 channels per stream).
The data rate is independently programmable for each input stream.
In Local 32 Mbps Mode, these pins are unused and should be externally
connected to a defined logic level.
Output Drive Enable (5 V Tolerant Input with Internal Pull-up).
An asynchronous input providing Output Enable control to the BSTo0-15,
LSTo0-15, BCSTo0-1, and LCSTo0-1 outputs.
When LOW, the BSTo0-15 and LSTo0-15 outputs are driven HIGH or high
impedance (dependent on the BORS and LORS pin settings respectively) and
the outputs BCSTo0-1 and LCSTo0-1 are driven low.
When HIGH, the outputs BSTo0-15, LSTo0-15, BCSTo0-1, and LCSTo0-1 are
enabled.
Backplane Output Reset State (5 V Tolerant Input with Internal
Pull-down).
When this input is LOW, the device will initialize with the BSTo0-15 outputs
driven high, and the BCSTo0-1 outputs driven low. Following initialization, the
Backplane stream outputs are always active and a high impedance state, if
required on a per-channel basis, may be implemented with external buffers
controlled by outputs BCSTo0-1.
When this input is HIGH, the device will initialize with the BSTo0-15 outputs at
high impedance and the BCSTo0-1 outputs driven low. Following initialization,
the Backplane stream outputs may be set active or high impedance using the
ODE pin or on a per-channel basis with the BE bit in the Backplane
Connection Memory.
Zarlink Semiconductor Inc.
ZL50050
12
Description
Data Sheet
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