ZL50020GAC ZARLINK [Zarlink Semiconductor Inc], ZL50020GAC Datasheet - Page 72
![no-image](/images/no-image-200.jpg)
ZL50020GAC
Manufacturer Part Number
ZL50020GAC
Description
Enhanced 2 K Digital Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50020GAC.pdf
(83 pages)
- Current page: 72 of 83
- Download datasheet (683Kb)
† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C, VDD_CORE at 1.8 V and VDD_IO at 3.3 V and are for design aid only: not guaranteed and not subject to produc-
tion testing.
AC Electrical Characteristics
1
16.384 Mbps
(16.384 MHz)
STio Delay - Active to Active
@2.048 Mbps
@4.096 Mbps
@8.192 Mbps
@16.384 Mbps
@2.048 Mbps
@4.096 Mbps
@8.192 Mbps
@16.384 Mbps
Input Frame Boundary
STi0 - 31
CKi
FPi
Characteristic
Ch255
Figure 30 - GCI-Bus Input Timing Diagram when Operated at 16 Mbps
Bit6
Ch255
Bit7
†
- ST-BUS/GCI-Bus Output Timing
Bit0
Ch0
t
SIS16
t
t
Sym.
t
t
t
t
t
t
SOD16
SOD16
SOD2
SOD4
SOD8
SOD2
SOD4
SOD8
Bit1
Ch0
t
SIH16
Zarlink Semiconductor Inc.
ZL50020
Min.
-6
-6
-6
-6
0
0
0
0
Bit2
Ch0
72
Typ.
Bit3
Ch0
‡
Max.
Ch0
6
6
6
6
0
0
0
0
Bit4
Units
Ch0
Bit5
ns
ns
ns
ns
ns
ns
ns
ns
C
Multiplied Clock Mode
Divided Clock Mode
L
Bit6
Ch0
= 30 pF
Test Conditions
Bit7
Ch0
Data Sheet
V
V
CT
TT
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